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exo2: Initial work on the exosphere rewrite.

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exo2: Implement uncompressor stub and boot code up to Main().

exo2: implement some more init (uart/gic)

exo2: implement more of init

exo2: improve reg api, add keyslot flag setters

exo2: implement se aes decryption/enc

exo2: fix bugs in loader stub/mmu mappings

exo2: start skeletoning bootconfig/global context types

arch: fix makefile flags

exo2: implement through master key derivation

exo2: implement device master keygen

exo2: more init through start of SetupSocSecurity

exo2: implement pmc secure scratch management

se: implement sticky bit validation

libexosphere: fix building for arm32

libexo: fix makefile flags

libexo: support building for arm64/arm

sc7fw: skeleton binary

sc7fw: skeleton a little more

sc7fw: implement all non-dram functionality

exo2: fix DivideUp error

sc7fw: implement more dram code, fix reg library errors

sc7fw: complete sc7fw impl.

exo2: skeleton the rest of SetupSocSecurity

exo2: implement fiq interrupt handler

exo2: implement all exception handlers

exo2: skeleton the entire smc api, implement the svc invoker

exo2: implement rest of SetupSocSecurity

exo2: correct slave security errors

exo2: fix register definition

exo2: minor fixes
This commit is contained in:
Michael Scire 2020-05-04 23:33:16 -07:00 • committed by SciresM
parent 71e0102f7a
commit f66b41c027
192 changed files with 15093 additions and 24 deletions
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121
libraries/libexosphere/source/fuse/fuse_api.cpp Normal file
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/*
* Copyright (c) 2018-2020 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <exosphere.hpp>
#include "fuse_registers.hpp"
namespace ams::fuse {
namespace {
struct OdmWord4 {
using HardwareState1 = util::BitPack32::Field<0, 2, int>;
using HardwareType1 = util::BitPack32::Field<HardwareState1::Next, 1, int>;
using DramId = util::BitPack32::Field<HardwareType1::Next, 5, int>;
using HardwareType2 = util::BitPack32::Field<DramId::Next, 1, int>;
using HardwareState2 = util::BitPack32::Field<HardwareType2::Next, 1, int>;
using QuestState = util::BitPack32::Field<HardwareState2::Next, 1, int>;
using FormatVersion = util::BitPack32::Field<QuestState::Next, 1, int>;
using Reserved = util::BitPack32::Field<FormatVersion::Next, 4, int>;
using HardwareType3 = util::BitPack32::Field<Reserved::Next, 4, int>;
};
constexpr ALWAYS_INLINE int GetHardwareStateValue(const util::BitPack32 odm_word4) {
constexpr auto HardwareState1Shift = 0;
constexpr auto HardwareState2Shift = OdmWord4::HardwareState1::Count + HardwareState1Shift;
return (odm_word4.Get<OdmWord4::HardwareState1>() << HardwareState1Shift) |
(odm_word4.Get<OdmWord4::HardwareState2>() << HardwareState2Shift);
}
constexpr ALWAYS_INLINE int GetHardwareTypeValue(const util::BitPack32 odm_word4) {
constexpr auto HardwareType1Shift = 0;
constexpr auto HardwareType2Shift = OdmWord4::HardwareType1::Count + HardwareType1Shift;
constexpr auto HardwareType3Shift = OdmWord4::HardwareType2::Count + HardwareType2Shift;
return (odm_word4.Get<OdmWord4::HardwareType1>() << HardwareType1Shift) |
(odm_word4.Get<OdmWord4::HardwareType2>() << HardwareType2Shift) |
(odm_word4.Get<OdmWord4::HardwareType3>() << HardwareType3Shift);
}
constinit uintptr_t g_register_address = secmon::MemoryRegionPhysicalDeviceFuses.GetAddress();
ALWAYS_INLINE volatile FuseRegisterRegion *GetRegisterRegion() {
return reinterpret_cast<volatile FuseRegisterRegion *>(g_register_address);
}
ALWAYS_INLINE volatile FuseRegisters &GetRegisters() {
return GetRegisterRegion()->fuse;
}
ALWAYS_INLINE volatile FuseChipRegisters &GetChipRegisters() {
return GetRegisterRegion()->chip;
}
}
void SetRegisterAddress(uintptr_t address) {
g_register_address = address;
}
void SetWriteSecureOnly() {
reg::Write(GetRegisters().FUSE_PRIVATEKEYDISABLE, FUSE_REG_BITS_ENUM(PRIVATEKEYDISABLE_TZ_STICKY_BIT_VAL, KEY_INVISIBLE));
}
void Lockout() {
reg::Write(GetRegisters().FUSE_DISABLEREGPROGRAM, FUSE_REG_BITS_ENUM(DISABLEREGPROGRAM_DISABLEREGPROGRAM_VAL, ENABLE));
}
u32 GetOdmWord(int index) {
return GetChipRegisters().FUSE_RESERVED_ODM[index];
}
HardwareType GetHardwareType() {
/* Read the odm word. */
const util::BitPack32 odm_word4 = { GetOdmWord(4) };
/* Get the value. */
const auto value = GetHardwareTypeValue(odm_word4);
switch (value) {
case 0x01: return HardwareType_Icosa;
case 0x02: return (true /* TODO: GetSocType() == SocType_Mariko */) ? HardwareType_Calcio : HardwareType_Copper;
case 0x04: return HardwareType_Iowa;
case 0x08: return HardwareType_Hoag;
case 0x10: return HardwareType_Five;
default: return HardwareType_Undefined;
}
}
HardwareState GetHardwareState() {
/* Read the odm word. */
const util::BitPack32 odm_word4 = { GetOdmWord(4) };
/* Get the value. */
const auto value = GetHardwareStateValue(odm_word4);
switch (value) {
case 3: return HardwareState_Development;
case 4: return HardwareState_Production;
default: return HardwareState_Undefined;
}
}
pmic::Regulator GetRegulator() {
/* TODO: How should mariko be handled? This reads from ODM word 28 in fuses (not presesnt in erista...). */
return pmic::Regulator_Erista_Max77621;
}
}