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exo: implement mariko fuse driver

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This commit is contained in:
Michael Scire 2020-06-29 04:40:59 -07:00
parent 2a5d1572e1
commit e16b87c843
2 changed files with 395 additions and 45 deletions
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354
libraries/libexosphere/source/fuse/fuse_registers.hpp
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@ -42,12 +42,162 @@ namespace ams::fuse {
u32 FUSE_PRIVATE_KEY2_NONZERO;
u32 FUSE_PRIVATE_KEY3_NONZERO;
u32 FUSE_PRIVATE_KEY4_NONZERO;
u32 _0x94[0x1B];
u32 _0x94;
};
static_assert(util::is_pod<FuseRegisters>::value);
static_assert(sizeof(FuseRegisters) == 0x100);
static_assert(sizeof(FuseRegisters) == 0x98);
struct FuseChipRegisters {
struct FuseChipRegistersCommon {
u32 _0x98[0x1A];
u32 FUSE_PRODUCTION_MODE;
u32 FUSE_JTAG_SECUREID_VALID;
u32 FUSE_ODM_LOCK;
u32 FUSE_OPT_OPENGL_EN;
u32 FUSE_SKU_INFO;
u32 FUSE_CPU_SPEEDO_0_CALIB;
u32 FUSE_CPU_IDDQ_CALIB;
u32 _0x11C;
u32 _0x120;
u32 _0x124;
u32 FUSE_OPT_FT_REV;
u32 FUSE_CPU_SPEEDO_1_CALIB;
u32 FUSE_CPU_SPEEDO_2_CALIB;
u32 FUSE_SOC_SPEEDO_0_CALIB;
u32 FUSE_SOC_SPEEDO_1_CALIB;
u32 FUSE_SOC_SPEEDO_2_CALIB;
u32 FUSE_SOC_IDDQ_CALIB;
u32 _0x144;
u32 FUSE_FA;
u32 FUSE_RESERVED_PRODUCTION;
u32 FUSE_HDMI_LANE0_CALIB;
u32 FUSE_HDMI_LANE1_CALIB;
u32 FUSE_HDMI_LANE2_CALIB;
u32 FUSE_HDMI_LANE3_CALIB;
u32 FUSE_ENCRYPTION_RATE;
u32 FUSE_PUBLIC_KEY[0x8];
u32 FUSE_TSENSOR1_CALIB;
u32 FUSE_TSENSOR2_CALIB;
u32 _0x18C;
u32 FUSE_OPT_CP_REV;
u32 FUSE_OPT_PFG;
u32 FUSE_TSENSOR0_CALIB;
u32 FUSE_FIRST_BOOTROM_PATCH_SIZE;
u32 FUSE_SECURITY_MODE;
u32 FUSE_PRIVATE_KEY[0x5];
u32 FUSE_ARM_JTAG_DIS;
u32 FUSE_BOOT_DEVICE_INFO;
u32 FUSE_RESERVED_SW;
u32 FUSE_OPT_VP9_DISABLE;
u32 FUSE_RESERVED_ODM_0[8 - 0];
u32 FUSE_OBS_DIS;
u32 _0x1EC;
u32 FUSE_USB_CALIB;
u32 FUSE_SKU_DIRECT_CONFIG;
u32 FUSE_KFUSE_PRIVKEY_CTRL;
u32 FUSE_PACKAGE_INFO;
u32 FUSE_OPT_VENDOR_CODE;
u32 FUSE_OPT_FAB_CODE;
u32 FUSE_OPT_LOT_CODE_0;
u32 FUSE_OPT_LOT_CODE_1;
u32 FUSE_OPT_WAFER_ID;
u32 FUSE_OPT_X_COORDINATE;
u32 FUSE_OPT_Y_COORDINATE;
u32 FUSE_OPT_SEC_DEBUG_EN;
u32 FUSE_OPT_OPS_RESERVED;
u32 _0x224;
u32 FUSE_GPU_IDDQ_CALIB;
u32 FUSE_TSENSOR3_CALIB;
u32 _0x234;
u32 _0x238;
u32 _0x23C;
u32 _0x240;
u32 _0x244;
u32 FUSE_OPT_SAMPLE_TYPE;
u32 FUSE_OPT_SUBREVISION;
u32 FUSE_OPT_SW_RESERVED_0;
u32 FUSE_OPT_SW_RESERVED_1;
u32 FUSE_TSENSOR4_CALIB;
u32 FUSE_TSENSOR5_CALIB;
u32 FUSE_TSENSOR6_CALIB;
u32 FUSE_TSENSOR7_CALIB;
u32 FUSE_OPT_PRIV_SEC_EN;
u32 _0x268;
u32 _0x26C;
u32 _0x270;
u32 _0x274;
u32 _0x278;
u32 FUSE_FUSE2TSEC_DEBUG_DISABLE;
u32 FUSE_TSENSOR_COMMON;
u32 FUSE_OPT_CP_BIN;
u32 FUSE_OPT_GPU_DISABLE;
u32 FUSE_OPT_FT_BIN;
u32 FUSE_OPT_DONE_MAP;
u32 _0x294;
u32 FUSE_APB2JTAG_DISABLE;
u32 FUSE_ODM_INFO;
u32 _0x2A0;
u32 _0x2A4;
u32 FUSE_ARM_CRYPT_DE_FEATURE;
u32 _0x2AC;
u32 _0x2B0;
u32 _0x2B4;
u32 _0x2B8;
u32 _0x2BC;
u32 FUSE_WOA_SKU_FLAG;
u32 FUSE_ECO_RESERVE_1;
u32 FUSE_GCPLEX_CONFIG_FUSE;
u32 FUSE_PRODUCTION_MONTH;
u32 FUSE_RAM_REPAIR_INDICATOR;
u32 FUSE_TSENSOR9_CALIB;
u32 _0x2D8;
u32 FUSE_VMIN_CALIBRATION;
u32 FUSE_AGING_SENSOR_CALIBRATION;
u32 FUSE_DEBUG_AUTHENTICATION;
u32 FUSE_SECURE_PROVISION_INDEX;
u32 FUSE_SECURE_PROVISION_INFO;
u32 FUSE_OPT_GPU_DISABLE_CP1;
u32 FUSE_SPARE_ENDIS;
u32 FUSE_ECO_RESERVE_0;
u32 _0x2FC;
u32 _0x300;
u32 FUSE_RESERVED_CALIB0;
u32 FUSE_RESERVED_CALIB1;
u32 FUSE_OPT_GPU_TPC0_DISABLE;
u32 FUSE_OPT_GPU_TPC0_DISABLE_CP1;
u32 FUSE_OPT_CPU_DISABLE;
u32 FUSE_OPT_CPU_DISABLE_CP1;
u32 FUSE_TSENSOR10_CALIB;
u32 FUSE_TSENSOR10_CALIB_AUX;
u32 _0x324;
u32 _0x328;
u32 _0x32C;
u32 _0x330;
u32 _0x334;
u32 FUSE_OPT_GPU_TPC0_DISABLE_CP2;
u32 FUSE_OPT_GPU_TPC1_DISABLE;
u32 FUSE_OPT_GPU_TPC1_DISABLE_CP1;
u32 FUSE_OPT_GPU_TPC1_DISABLE_CP2;
u32 FUSE_OPT_CPU_DISABLE_CP2;
u32 FUSE_OPT_GPU_DISABLE_CP2;
u32 FUSE_USB_CALIB_EXT;
u32 FUSE_RESERVED_FIELD;
u32 _0x358;
u32 _0x35C;
u32 _0x360;
u32 _0x364;
u32 _0x368;
u32 _0x36C;
u32 _0x370;
u32 _0x374;
u32 _0x378;
u32 FUSE_SPARE_REALIGNMENT_REG;
u32 FUSE_SPARE_BIT[0x20];
};
static_assert(util::is_pod<FuseChipRegistersCommon>::value);
static_assert(sizeof(FuseChipRegistersCommon) == 0x400 - 0x98);
struct FuseChipRegistersErista {
u32 _0x98[0x1A];
u32 FUSE_PRODUCTION_MODE;
u32 FUSE_JTAG_SECUREID_VALID;
u32 FUSE_ODM_LOCK;
@ -87,7 +237,7 @@ namespace ams::fuse {
u32 FUSE_BOOT_DEVICE_INFO;
u32 FUSE_RESERVED_SW;
u32 FUSE_OPT_VP9_DISABLE;
u32 FUSE_RESERVED_ODM[0x8];
u32 FUSE_RESERVED_ODM_0[8 - 0];
u32 FUSE_OBS_DIS;
u32 FUSE_NOR_INFO;
u32 FUSE_USB_CALIB;
@ -121,34 +271,34 @@ namespace ams::fuse {
u32 FUSE_TSENSOR7_CALIB;
u32 FUSE_OPT_PRIV_SEC_EN;
u32 FUSE_PKC_DISABLE;
u32 _0x16C;
u32 _0x170;
u32 _0x174;
u32 _0x178;
u32 _0x26C;
u32 _0x270;
u32 _0x274;
u32 _0x278;
u32 FUSE_FUSE2TSEC_DEBUG_DISABLE;
u32 FUSE_TSENSOR_COMMON;
u32 FUSE_OPT_CP_BIN;
u32 FUSE_OPT_GPU_DISABLE;
u32 FUSE_OPT_FT_BIN;
u32 FUSE_OPT_DONE_MAP;
u32 _0x194;
u32 _0x294;
u32 FUSE_APB2JTAG_DISABLE;
u32 FUSE_ODM_INFO;
u32 _0x1A0;
u32 _0x1A4;
u32 _0x2A0;
u32 _0x2A4;
u32 FUSE_ARM_CRYPT_DE_FEATURE;
u32 _0x1AC;
u32 _0x1B0;
u32 _0x1B4;
u32 _0x1B8;
u32 _0x1BC;
u32 _0x2AC;
u32 _0x2B0;
u32 _0x2B4;
u32 _0x2B8;
u32 _0x2BC;
u32 FUSE_WOA_SKU_FLAG;
u32 FUSE_ECO_RESERVE_1;
u32 FUSE_GCPLEX_CONFIG_FUSE;
u32 FUSE_PRODUCTION_MONTH;
u32 FUSE_RAM_REPAIR_INDICATOR;
u32 FUSE_TSENSOR9_CALIB;
u32 _0x1D8;
u32 _0x2D8;
u32 FUSE_VMIN_CALIBRATION;
u32 FUSE_AGING_SENSOR_CALIBRATION;
u32 FUSE_DEBUG_AUTHENTICATION;
@ -157,8 +307,8 @@ namespace ams::fuse {
u32 FUSE_OPT_GPU_DISABLE_CP1;
u32 FUSE_SPARE_ENDIS;
u32 FUSE_ECO_RESERVE_0;
u32 _0x1FC;
u32 _0x200;
u32 _0x2FC;
u32 _0x300;
u32 FUSE_RESERVED_CALIB0;
u32 FUSE_RESERVED_CALIB1;
u32 FUSE_OPT_GPU_TPC0_DISABLE;
@ -181,23 +331,175 @@ namespace ams::fuse {
u32 FUSE_USB_CALIB_EXT;
u32 FUSE_RESERVED_FIELD;
u32 FUSE_OPT_ECC_EN;
u32 _0x25C;
u32 _0x260;
u32 _0x264;
u32 _0x268;
u32 _0x35C;
u32 _0x360;
u32 _0x364;
u32 _0x368;
u32 _0x36C;
u32 _0x370;
u32 _0x374;
u32 _0x378;
u32 FUSE_SPARE_REALIGNMENT_REG;
u32 FUSE_SPARE_BIT[0x20];
};
static_assert(util::is_pod<FuseChipRegistersErista>::value);
static_assert(sizeof(FuseChipRegistersErista) == 0x400 - 0x98);
struct FuseChipRegistersMariko {
u32 FUSE_RESERVED_ODM_8[22 - 8];
u32 FUSE_KEK[4];
u32 FUSE_BEK[4];
u32 _0xF0[4];
u32 FUSE_PRODUCTION_MODE;
u32 FUSE_JTAG_SECUREID_VALID;
u32 FUSE_ODM_LOCK;
u32 FUSE_OPT_OPENGL_EN;
u32 FUSE_SKU_INFO;
u32 FUSE_CPU_SPEEDO_0_CALIB;
u32 FUSE_CPU_IDDQ_CALIB;
u32 FUSE_RESERVED_ODM_22[25 - 22];
u32 FUSE_OPT_FT_REV;
u32 FUSE_CPU_SPEEDO_1_CALIB;
u32 FUSE_CPU_SPEEDO_2_CALIB;
u32 FUSE_SOC_SPEEDO_0_CALIB;
u32 FUSE_SOC_SPEEDO_1_CALIB;
u32 FUSE_SOC_SPEEDO_2_CALIB;
u32 FUSE_SOC_IDDQ_CALIB;
u32 FUSE_RESERVED_ODM_25[26 - 25];
u32 FUSE_FA;
u32 FUSE_RESERVED_PRODUCTION;
u32 FUSE_HDMI_LANE0_CALIB;
u32 FUSE_HDMI_LANE1_CALIB;
u32 FUSE_HDMI_LANE2_CALIB;
u32 FUSE_HDMI_LANE3_CALIB;
u32 FUSE_ENCRYPTION_RATE;
u32 FUSE_PUBLIC_KEY[0x8];
u32 FUSE_TSENSOR1_CALIB;
u32 FUSE_TSENSOR2_CALIB;
u32 FUSE_OPT_SECURE_SCC_DIS;
u32 FUSE_OPT_CP_REV;
u32 FUSE_OPT_PFG;
u32 FUSE_TSENSOR0_CALIB;
u32 FUSE_FIRST_BOOTROM_PATCH_SIZE;
u32 FUSE_SECURITY_MODE;
u32 FUSE_PRIVATE_KEY[0x5];
u32 FUSE_ARM_JTAG_DIS;
u32 FUSE_BOOT_DEVICE_INFO;
u32 FUSE_RESERVED_SW;
u32 FUSE_OPT_VP9_DISABLE;
u32 FUSE_RESERVED_ODM_0[8 - 0];
u32 FUSE_OBS_DIS;
u32 _0x1EC;
u32 FUSE_USB_CALIB;
u32 FUSE_SKU_DIRECT_CONFIG;
u32 FUSE_KFUSE_PRIVKEY_CTRL;
u32 FUSE_PACKAGE_INFO;
u32 FUSE_OPT_VENDOR_CODE;
u32 FUSE_OPT_FAB_CODE;
u32 FUSE_OPT_LOT_CODE_0;
u32 FUSE_OPT_LOT_CODE_1;
u32 FUSE_OPT_WAFER_ID;
u32 FUSE_OPT_X_COORDINATE;
u32 FUSE_OPT_Y_COORDINATE;
u32 FUSE_OPT_SEC_DEBUG_EN;
u32 FUSE_OPT_OPS_RESERVED;
u32 _0x224;
u32 FUSE_GPU_IDDQ_CALIB;
u32 FUSE_TSENSOR3_CALIB;
u32 FUSE_CLOCK_BONDOUT0;
u32 FUSE_CLOCK_BONDOUT1;
u32 FUSE_RESERVED_ODM_26[29 - 26];
u32 FUSE_OPT_SAMPLE_TYPE;
u32 FUSE_OPT_SUBREVISION;
u32 FUSE_OPT_SW_RESERVED_0;
u32 FUSE_OPT_SW_RESERVED_1;
u32 FUSE_TSENSOR4_CALIB;
u32 FUSE_TSENSOR5_CALIB;
u32 FUSE_TSENSOR6_CALIB;
u32 FUSE_TSENSOR7_CALIB;
u32 FUSE_OPT_PRIV_SEC_EN;
u32 FUSE_BOOT_SECURITY_INFO;
u32 _0x26C;
u32 _0x270;
u32 _0x274;
u32 _0x278;
u32 FUSE_FUSE2TSEC_DEBUG_DISABLE;
u32 FUSE_TSENSOR_COMMON;
u32 FUSE_OPT_CP_BIN;
u32 FUSE_OPT_GPU_DISABLE;
u32 FUSE_OPT_FT_BIN;
u32 FUSE_OPT_DONE_MAP;
u32 FUSE_RESERVED_ODM_29[30 - 29];
u32 FUSE_APB2JTAG_DISABLE;
u32 FUSE_ODM_INFO;
u32 _0x2A0;
u32 _0x2A4;
u32 FUSE_ARM_CRYPT_DE_FEATURE;
u32 _0x2AC;
u32 _0x2B0;
u32 _0x2B4;
u32 _0x2B8;
u32 _0x2BC;
u32 FUSE_WOA_SKU_FLAG;
u32 FUSE_ECO_RESERVE_1;
u32 FUSE_GCPLEX_CONFIG_FUSE;
u32 FUSE_PRODUCTION_MONTH;
u32 FUSE_RAM_REPAIR_INDICATOR;
u32 FUSE_TSENSOR9_CALIB;
u32 _0x2D8;
u32 FUSE_VMIN_CALIBRATION;
u32 FUSE_AGING_SENSOR_CALIBRATION;
u32 FUSE_DEBUG_AUTHENTICATION;
u32 FUSE_SECURE_PROVISION_INDEX;
u32 FUSE_SECURE_PROVISION_INFO;
u32 FUSE_OPT_GPU_DISABLE_CP1;
u32 FUSE_SPARE_ENDIS;
u32 FUSE_ECO_RESERVE_0;
u32 _0x2FC;
u32 _0x300;
u32 FUSE_RESERVED_CALIB0;
u32 FUSE_RESERVED_CALIB1;
u32 FUSE_OPT_GPU_TPC0_DISABLE;
u32 FUSE_OPT_GPU_TPC0_DISABLE_CP1;
u32 FUSE_OPT_CPU_DISABLE;
u32 FUSE_OPT_CPU_DISABLE_CP1;
u32 FUSE_TSENSOR10_CALIB;
u32 FUSE_TSENSOR10_CALIB_AUX;
u32 _0x324;
u32 _0x328;
u32 _0x32C;
u32 _0x330;
u32 _0x334;
u32 FUSE_OPT_GPU_TPC0_DISABLE_CP2;
u32 FUSE_OPT_GPU_TPC1_DISABLE;
u32 FUSE_OPT_GPU_TPC1_DISABLE_CP1;
u32 FUSE_OPT_GPU_TPC1_DISABLE_CP2;
u32 FUSE_OPT_CPU_DISABLE_CP2;
u32 FUSE_OPT_GPU_DISABLE_CP2;
u32 FUSE_USB_CALIB_EXT;
u32 FUSE_RESERVED_FIELD;
u32 _0x358;
u32 _0x35C;
u32 _0x360;
u32 _0x364;
u32 _0x368;
u32 _0x36C;
u32 _0x370;
u32 _0x374;
u32 _0x378;
u32 FUSE_SPARE_REALIGNMENT_REG;
u32 FUSE_SPARE_BIT[0x20];
};
static_assert(util::is_pod<FuseChipRegisters>::value);
static_assert(sizeof(FuseChipRegisters) == 0x300);
static_assert(util::is_pod<FuseChipRegistersMariko>::value);
static_assert(sizeof(FuseChipRegistersMariko) == 0x400 - 0x98);
struct FuseRegisterRegion {
FuseRegisters fuse;
FuseChipRegisters chip;
union {
FuseChipRegistersCommon chip_common;
FuseChipRegistersErista chip_erista;
FuseChipRegistersMariko chip_mariko;
};
};
static_assert(util::is_pod<FuseRegisterRegion>::value);
static_assert(sizeof(FuseRegisterRegion) == secmon::MemoryRegionPhysicalDeviceFuses.GetSize());