mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2025-05-23 03:06:52 -04:00
strat: use m_ for member variables
This commit is contained in:
Michael Scire
parent
ce28591ab2
commit
a595c232b9
425 changed files with 8531 additions and 8484 deletions
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@ -46,41 +46,41 @@ namespace ams::dmnt::cheat::impl {
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void CheatVirtualMachine::OpenDebugLogFile() {
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#ifdef DMNT_CHEAT_VM_DEBUG_LOG
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CloseDebugLogFile();
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R_ABORT_UNLESS(fs::OpenFile(std::addressof(this->debug_log_file), "sdmc:/atmosphere/cheat_vm_logs/debug_log.txt"));
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this->debug_log_file_offset = 0;
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R_ABORT_UNLESS(fs::OpenFile(std::addressof(m_debug_log_file), "sdmc:/atmosphere/cheat_vm_logs/debug_log.txt"));
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m_debug_log_file_offset = 0;
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#endif
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}
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void CheatVirtualMachine::CloseDebugLogFile() {
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#ifdef DMNT_CHEAT_VM_DEBUG_LOG
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if (this->has_debug_log_file) {
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fs::CloseFile(this->debug_log_file);
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if (m_has_debug_log_file) {
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fs::CloseFile(m_debug_log_file);
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}
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this->has_debug_log_file = false;
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m_has_debug_log_file = false;
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#endif
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}
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void CheatVirtualMachine::LogToDebugFile(const char *format, ...) {
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#ifdef DMNT_CHEAT_VM_DEBUG_LOG
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if (!this->has_debug_log_file) {
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if (!m_has_debug_log_file) {
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return;
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}
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{
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std::va_list vl;
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va_start(vl, format);
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util::VSNPrintf(this->debug_log_format_buf, sizeof(this->debug_log_format_buf) - 1, format, vl);
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util::VSNPrintf(m_debug_log_format_buf, sizeof(m_debug_log_format_buf) - 1, format, vl);
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va_end(vl);
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}
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size_t fmt_len = std::strlen(this->debug_log_format_buf);
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if (this->debug_log_format_buf[fmt_len - 1] != '\n') {
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this->debug_log_format_buf[fmt_len + 0] = '\n';
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this->debug_log_format_buf[fmt_len + 1] = '\x00';
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size_t fmt_len = std::strlen(m_debug_log_format_buf);
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if (m_debug_log_format_buf[fmt_len - 1] != '\n') {
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m_debug_log_format_buf[fmt_len + 0] = '\n';
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m_debug_log_format_buf[fmt_len + 1] = '\x00';
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fmt_len += 1;
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}
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fs::WriteFile(this->debug_log_file, this->debug_log_offset, this->debug_log_format_buf, fmt_len, fs::WriteOption::Flush);
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fs::WriteFile(m_debug_log_file, m_debug_log_offset, m_debug_log_format_buf, fmt_len, fs::WriteOption::Flush);
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#else
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AMS_UNUSED(format);
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#endif
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@ -295,10 +295,10 @@ namespace ams::dmnt::cheat::impl {
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bool CheatVirtualMachine::DecodeNextOpcode(CheatVmOpcode *out) {
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/* If we've ever seen a decode failure, return false. */
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bool valid = this->decode_success;
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bool valid = m_decode_success;
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CheatVmOpcode opcode = {};
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ON_SCOPE_EXIT {
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this->decode_success &= valid;
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m_decode_success &= valid;
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if (valid) {
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*out = opcode;
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}
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@ -306,11 +306,11 @@ namespace ams::dmnt::cheat::impl {
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/* Helper function for getting instruction dwords. */
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auto GetNextDword = [&]() {
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if (this->instruction_ptr >= this->num_opcodes) {
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if (m_instruction_ptr >= m_num_opcodes) {
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valid = false;
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return static_cast<u32>(0);
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}
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return this->program[this->instruction_ptr++];
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return m_program[m_instruction_ptr++];
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};
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/* Helper function for parsing a VmInt. */
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@ -671,12 +671,12 @@ namespace ams::dmnt::cheat::impl {
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}
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void CheatVirtualMachine::SkipConditionalBlock(bool is_if) {
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if (this->condition_depth > 0) {
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if (m_condition_depth > 0) {
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/* We want to continue until we're out of the current block. */
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const size_t desired_depth = this->condition_depth - 1;
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const size_t desired_depth = m_condition_depth - 1;
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CheatVmOpcode skip_opcode;
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while (this->condition_depth > desired_depth && this->DecodeNextOpcode(std::addressof(skip_opcode))) {
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while (m_condition_depth > desired_depth && this->DecodeNextOpcode(std::addressof(skip_opcode))) {
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/* Decode instructions until we see end of the current conditional block. */
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/* NOTE: This is broken in gateway's implementation. */
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/* Gateway currently checks for "0x2" instead of "0x20000000" */
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@ -685,18 +685,18 @@ namespace ams::dmnt::cheat::impl {
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/* We also support nesting of conditional blocks, and Gateway does not. */
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if (skip_opcode.begin_conditional_block) {
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this->condition_depth++;
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m_condition_depth++;
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} else if (skip_opcode.opcode == CheatVmOpcodeType_EndConditionalBlock) {
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if (!skip_opcode.end_cond.is_else) {
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this->condition_depth--;
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} else if (is_if && this->condition_depth - 1 == desired_depth) {
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m_condition_depth--;
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} else if (is_if && m_condition_depth - 1 == desired_depth) {
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/* An if will continue to an else at the same depth. */
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break;
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}
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}
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}
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} else {
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/* Skipping, but this->condition_depth = 0. */
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/* Skipping, but m_condition_depth = 0. */
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/* This is an error condition. */
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/* This could occur with a mismatched "else" opcode, for example. */
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R_ABORT_UNLESS(ResultVirtualMachineInvalidConditionDepth());
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@ -735,29 +735,29 @@ namespace ams::dmnt::cheat::impl {
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void CheatVirtualMachine::ResetState() {
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for (size_t i = 0; i < CheatVirtualMachine::NumRegisters; i++) {
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this->registers[i] = 0;
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this->saved_values[i] = 0;
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this->loop_tops[i] = 0;
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m_registers[i] = 0;
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m_saved_values[i] = 0;
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m_loop_tops[i] = 0;
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}
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this->instruction_ptr = 0;
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this->condition_depth = 0;
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this->decode_success = true;
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m_instruction_ptr = 0;
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m_condition_depth = 0;
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m_decode_success = true;
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}
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bool CheatVirtualMachine::LoadProgram(const CheatEntry *cheats, size_t num_cheats) {
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/* Reset opcode count. */
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this->num_opcodes = 0;
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m_num_opcodes = 0;
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for (size_t i = 0; i < num_cheats; i++) {
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if (cheats[i].enabled) {
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/* Bounds check. */
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if (cheats[i].definition.num_opcodes + this->num_opcodes > MaximumProgramOpcodeCount) {
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this->num_opcodes = 0;
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if (cheats[i].definition.num_opcodes + m_num_opcodes > MaximumProgramOpcodeCount) {
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m_num_opcodes = 0;
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return false;
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}
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for (size_t n = 0; n < cheats[i].definition.num_opcodes; n++) {
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this->program[this->num_opcodes++] = cheats[i].definition.opcodes[n];
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m_program[m_num_opcodes++] = cheats[i].definition.opcodes[n];
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}
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}
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}
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@ -785,27 +785,27 @@ namespace ams::dmnt::cheat::impl {
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/* Loop until program finishes. */
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while (this->DecodeNextOpcode(std::addressof(cur_opcode))) {
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this->LogToDebugFile("Instruction Ptr: %04x\n", (u32)this->instruction_ptr);
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this->LogToDebugFile("Instruction Ptr: %04x\n", (u32)m_instruction_ptr);
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for (size_t i = 0; i < NumRegisters; i++) {
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this->LogToDebugFile("Registers[%02x]: %016lx\n", i, this->registers[i]);
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this->LogToDebugFile("Registers[%02x]: %016lx\n", i, m_registers[i]);
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}
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for (size_t i = 0; i < NumRegisters; i++) {
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this->LogToDebugFile("SavedRegs[%02x]: %016lx\n", i, this->saved_values[i]);
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this->LogToDebugFile("SavedRegs[%02x]: %016lx\n", i, m_saved_values[i]);
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}
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this->LogOpcode(std::addressof(cur_opcode));
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/* Increment conditional depth, if relevant. */
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if (cur_opcode.begin_conditional_block) {
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this->condition_depth++;
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m_condition_depth++;
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}
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switch (cur_opcode.opcode) {
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case CheatVmOpcodeType_StoreStatic:
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{
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/* Calculate address, write value to memory. */
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u64 dst_address = GetCheatProcessAddress(metadata, cur_opcode.store_static.mem_type, cur_opcode.store_static.rel_address + this->registers[cur_opcode.store_static.offset_register]);
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u64 dst_address = GetCheatProcessAddress(metadata, cur_opcode.store_static.mem_type, cur_opcode.store_static.rel_address + m_registers[cur_opcode.store_static.offset_register]);
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u64 dst_value = GetVmInt(cur_opcode.store_static.value, cur_opcode.store_static.bit_width);
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switch (cur_opcode.store_static.bit_width) {
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case 1:
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@ -866,34 +866,34 @@ namespace ams::dmnt::cheat::impl {
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} else {
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/* Decrement the condition depth. */
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/* We will assume, graciously, that mismatched conditional block ends are a nop. */
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if (this->condition_depth > 0) {
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this->condition_depth--;
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if (m_condition_depth > 0) {
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m_condition_depth--;
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}
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}
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break;
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case CheatVmOpcodeType_ControlLoop:
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if (cur_opcode.ctrl_loop.start_loop) {
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/* Start a loop. */
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this->registers[cur_opcode.ctrl_loop.reg_index] = cur_opcode.ctrl_loop.num_iters;
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this->loop_tops[cur_opcode.ctrl_loop.reg_index] = this->instruction_ptr;
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m_registers[cur_opcode.ctrl_loop.reg_index] = cur_opcode.ctrl_loop.num_iters;
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m_loop_tops[cur_opcode.ctrl_loop.reg_index] = m_instruction_ptr;
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} else {
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/* End a loop. */
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this->registers[cur_opcode.ctrl_loop.reg_index]--;
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if (this->registers[cur_opcode.ctrl_loop.reg_index] != 0) {
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this->instruction_ptr = this->loop_tops[cur_opcode.ctrl_loop.reg_index];
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m_registers[cur_opcode.ctrl_loop.reg_index]--;
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if (m_registers[cur_opcode.ctrl_loop.reg_index] != 0) {
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m_instruction_ptr = m_loop_tops[cur_opcode.ctrl_loop.reg_index];
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}
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}
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break;
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case CheatVmOpcodeType_LoadRegisterStatic:
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/* Set a register to a static value. */
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this->registers[cur_opcode.ldr_static.reg_index] = cur_opcode.ldr_static.value;
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m_registers[cur_opcode.ldr_static.reg_index] = cur_opcode.ldr_static.value;
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break;
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case CheatVmOpcodeType_LoadRegisterMemory:
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{
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/* Choose source address. */
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u64 src_address;
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if (cur_opcode.ldr_memory.load_from_reg) {
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src_address = this->registers[cur_opcode.ldr_memory.reg_index] + cur_opcode.ldr_memory.rel_address;
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src_address = m_registers[cur_opcode.ldr_memory.reg_index] + cur_opcode.ldr_memory.rel_address;
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} else {
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src_address = GetCheatProcessAddress(metadata, cur_opcode.ldr_memory.mem_type, cur_opcode.ldr_memory.rel_address);
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}
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@ -903,7 +903,7 @@ namespace ams::dmnt::cheat::impl {
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case 2:
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case 4:
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case 8:
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dmnt::cheat::impl::ReadCheatProcessMemoryUnsafe(src_address, std::addressof(this->registers[cur_opcode.ldr_memory.reg_index]), cur_opcode.ldr_memory.bit_width);
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dmnt::cheat::impl::ReadCheatProcessMemoryUnsafe(src_address, std::addressof(m_registers[cur_opcode.ldr_memory.reg_index]), cur_opcode.ldr_memory.bit_width);
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break;
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}
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}
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@ -911,10 +911,10 @@ namespace ams::dmnt::cheat::impl {
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case CheatVmOpcodeType_StoreStaticToAddress:
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{
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/* Calculate address. */
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u64 dst_address = this->registers[cur_opcode.str_static.reg_index];
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u64 dst_address = m_registers[cur_opcode.str_static.reg_index];
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u64 dst_value = cur_opcode.str_static.value;
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if (cur_opcode.str_static.add_offset_reg) {
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dst_address += this->registers[cur_opcode.str_static.offset_reg_index];
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dst_address += m_registers[cur_opcode.str_static.offset_reg_index];
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}
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/* Write value to memory. Gateway only writes on valid bitwidth. */
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switch (cur_opcode.str_static.bit_width) {
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@ -927,7 +927,7 @@ namespace ams::dmnt::cheat::impl {
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}
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/* Increment register if relevant. */
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if (cur_opcode.str_static.increment_reg) {
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this->registers[cur_opcode.str_static.reg_index] += cur_opcode.str_static.bit_width;
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m_registers[cur_opcode.str_static.reg_index] += cur_opcode.str_static.bit_width;
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}
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}
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break;
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@ -936,19 +936,19 @@ namespace ams::dmnt::cheat::impl {
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/* Do requested math. */
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switch (cur_opcode.perform_math_static.math_type) {
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case RegisterArithmeticType_Addition:
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this->registers[cur_opcode.perform_math_static.reg_index] += (u64)cur_opcode.perform_math_static.value;
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m_registers[cur_opcode.perform_math_static.reg_index] += (u64)cur_opcode.perform_math_static.value;
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break;
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case RegisterArithmeticType_Subtraction:
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this->registers[cur_opcode.perform_math_static.reg_index] -= (u64)cur_opcode.perform_math_static.value;
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m_registers[cur_opcode.perform_math_static.reg_index] -= (u64)cur_opcode.perform_math_static.value;
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break;
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case RegisterArithmeticType_Multiplication:
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this->registers[cur_opcode.perform_math_static.reg_index] *= (u64)cur_opcode.perform_math_static.value;
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m_registers[cur_opcode.perform_math_static.reg_index] *= (u64)cur_opcode.perform_math_static.value;
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break;
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case RegisterArithmeticType_LeftShift:
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this->registers[cur_opcode.perform_math_static.reg_index] <<= (u64)cur_opcode.perform_math_static.value;
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m_registers[cur_opcode.perform_math_static.reg_index] <<= (u64)cur_opcode.perform_math_static.value;
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break;
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case RegisterArithmeticType_RightShift:
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this->registers[cur_opcode.perform_math_static.reg_index] >>= (u64)cur_opcode.perform_math_static.value;
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m_registers[cur_opcode.perform_math_static.reg_index] >>= (u64)cur_opcode.perform_math_static.value;
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break;
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default:
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/* Do not handle extensions here. */
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@ -957,16 +957,16 @@ namespace ams::dmnt::cheat::impl {
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/* Apply bit width. */
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switch (cur_opcode.perform_math_static.bit_width) {
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case 1:
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this->registers[cur_opcode.perform_math_static.reg_index] = static_cast<u8>(this->registers[cur_opcode.perform_math_static.reg_index]);
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m_registers[cur_opcode.perform_math_static.reg_index] = static_cast<u8>(m_registers[cur_opcode.perform_math_static.reg_index]);
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break;
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case 2:
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this->registers[cur_opcode.perform_math_static.reg_index] = static_cast<u16>(this->registers[cur_opcode.perform_math_static.reg_index]);
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m_registers[cur_opcode.perform_math_static.reg_index] = static_cast<u16>(m_registers[cur_opcode.perform_math_static.reg_index]);
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break;
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case 4:
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this->registers[cur_opcode.perform_math_static.reg_index] = static_cast<u32>(this->registers[cur_opcode.perform_math_static.reg_index]);
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m_registers[cur_opcode.perform_math_static.reg_index] = static_cast<u32>(m_registers[cur_opcode.perform_math_static.reg_index]);
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break;
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case 8:
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this->registers[cur_opcode.perform_math_static.reg_index] = static_cast<u64>(this->registers[cur_opcode.perform_math_static.reg_index]);
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m_registers[cur_opcode.perform_math_static.reg_index] = static_cast<u64>(m_registers[cur_opcode.perform_math_static.reg_index]);
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break;
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}
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}
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@ -980,10 +980,10 @@ namespace ams::dmnt::cheat::impl {
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break;
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case CheatVmOpcodeType_PerformArithmeticRegister:
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{
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const u64 operand_1_value = this->registers[cur_opcode.perform_math_reg.src_reg_1_index];
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const u64 operand_1_value = m_registers[cur_opcode.perform_math_reg.src_reg_1_index];
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const u64 operand_2_value = cur_opcode.perform_math_reg.has_immediate ?
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GetVmInt(cur_opcode.perform_math_reg.value, cur_opcode.perform_math_reg.bit_width) :
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this->registers[cur_opcode.perform_math_reg.src_reg_2_index];
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m_registers[cur_opcode.perform_math_reg.src_reg_2_index];
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u64 res_val = 0;
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/* Do requested math. */
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@ -1038,32 +1038,32 @@ namespace ams::dmnt::cheat::impl {
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}
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/* Save to register. */
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this->registers[cur_opcode.perform_math_reg.dst_reg_index] = res_val;
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m_registers[cur_opcode.perform_math_reg.dst_reg_index] = res_val;
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}
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break;
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case CheatVmOpcodeType_StoreRegisterToAddress:
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{
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/* Calculate address. */
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u64 dst_value = this->registers[cur_opcode.str_register.str_reg_index];
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u64 dst_address = this->registers[cur_opcode.str_register.addr_reg_index];
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u64 dst_value = m_registers[cur_opcode.str_register.str_reg_index];
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u64 dst_address = m_registers[cur_opcode.str_register.addr_reg_index];
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switch (cur_opcode.str_register.ofs_type) {
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case StoreRegisterOffsetType_None:
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/* Nothing more to do */
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break;
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case StoreRegisterOffsetType_Reg:
|
||||
dst_address += this->registers[cur_opcode.str_register.ofs_reg_index];
|
||||
dst_address += m_registers[cur_opcode.str_register.ofs_reg_index];
|
||||
break;
|
||||
case StoreRegisterOffsetType_Imm:
|
||||
dst_address += cur_opcode.str_register.rel_address;
|
||||
break;
|
||||
case StoreRegisterOffsetType_MemReg:
|
||||
dst_address = GetCheatProcessAddress(metadata, cur_opcode.str_register.mem_type, this->registers[cur_opcode.str_register.addr_reg_index]);
|
||||
dst_address = GetCheatProcessAddress(metadata, cur_opcode.str_register.mem_type, m_registers[cur_opcode.str_register.addr_reg_index]);
|
||||
break;
|
||||
case StoreRegisterOffsetType_MemImm:
|
||||
dst_address = GetCheatProcessAddress(metadata, cur_opcode.str_register.mem_type, cur_opcode.str_register.rel_address);
|
||||
break;
|
||||
case StoreRegisterOffsetType_MemImmReg:
|
||||
dst_address = GetCheatProcessAddress(metadata, cur_opcode.str_register.mem_type, this->registers[cur_opcode.str_register.addr_reg_index] + cur_opcode.str_register.rel_address);
|
||||
dst_address = GetCheatProcessAddress(metadata, cur_opcode.str_register.mem_type, m_registers[cur_opcode.str_register.addr_reg_index] + cur_opcode.str_register.rel_address);
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -1079,7 +1079,7 @@ namespace ams::dmnt::cheat::impl {
|
|||
|
||||
/* Increment register if relevant. */
|
||||
if (cur_opcode.str_register.increment_reg) {
|
||||
this->registers[cur_opcode.str_register.addr_reg_index] += cur_opcode.str_register.bit_width;
|
||||
m_registers[cur_opcode.str_register.addr_reg_index] += cur_opcode.str_register.bit_width;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
|
@ -1089,16 +1089,16 @@ namespace ams::dmnt::cheat::impl {
|
|||
u64 src_value = 0;
|
||||
switch (cur_opcode.begin_reg_cond.bit_width) {
|
||||
case 1:
|
||||
src_value = static_cast<u8>(this->registers[cur_opcode.begin_reg_cond.val_reg_index] & 0xFFul);
|
||||
src_value = static_cast<u8>(m_registers[cur_opcode.begin_reg_cond.val_reg_index] & 0xFFul);
|
||||
break;
|
||||
case 2:
|
||||
src_value = static_cast<u16>(this->registers[cur_opcode.begin_reg_cond.val_reg_index] & 0xFFFFul);
|
||||
src_value = static_cast<u16>(m_registers[cur_opcode.begin_reg_cond.val_reg_index] & 0xFFFFul);
|
||||
break;
|
||||
case 4:
|
||||
src_value = static_cast<u32>(this->registers[cur_opcode.begin_reg_cond.val_reg_index] & 0xFFFFFFFFul);
|
||||
src_value = static_cast<u32>(m_registers[cur_opcode.begin_reg_cond.val_reg_index] & 0xFFFFFFFFul);
|
||||
break;
|
||||
case 8:
|
||||
src_value = static_cast<u64>(this->registers[cur_opcode.begin_reg_cond.val_reg_index] & 0xFFFFFFFFFFFFFFFFul);
|
||||
src_value = static_cast<u64>(m_registers[cur_opcode.begin_reg_cond.val_reg_index] & 0xFFFFFFFFFFFFFFFFul);
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -1109,16 +1109,16 @@ namespace ams::dmnt::cheat::impl {
|
|||
} else if (cur_opcode.begin_reg_cond.comp_type == CompareRegisterValueType_OtherRegister) {
|
||||
switch (cur_opcode.begin_reg_cond.bit_width) {
|
||||
case 1:
|
||||
cond_value = static_cast<u8>(this->registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFul);
|
||||
cond_value = static_cast<u8>(m_registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFul);
|
||||
break;
|
||||
case 2:
|
||||
cond_value = static_cast<u16>(this->registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFFFul);
|
||||
cond_value = static_cast<u16>(m_registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFFFul);
|
||||
break;
|
||||
case 4:
|
||||
cond_value = static_cast<u32>(this->registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFFFFFFFul);
|
||||
cond_value = static_cast<u32>(m_registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFFFFFFFul);
|
||||
break;
|
||||
case 8:
|
||||
cond_value = static_cast<u64>(this->registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFFFFFFFFFFFFFFFul);
|
||||
cond_value = static_cast<u64>(m_registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFFFFFFFFFFFFFFFul);
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
|
|
@ -1128,13 +1128,13 @@ namespace ams::dmnt::cheat::impl {
|
|||
cond_address = GetCheatProcessAddress(metadata, cur_opcode.begin_reg_cond.mem_type, cur_opcode.begin_reg_cond.rel_address);
|
||||
break;
|
||||
case CompareRegisterValueType_MemoryOfsReg:
|
||||
cond_address = GetCheatProcessAddress(metadata, cur_opcode.begin_reg_cond.mem_type, this->registers[cur_opcode.begin_reg_cond.ofs_reg_index]);
|
||||
cond_address = GetCheatProcessAddress(metadata, cur_opcode.begin_reg_cond.mem_type, m_registers[cur_opcode.begin_reg_cond.ofs_reg_index]);
|
||||
break;
|
||||
case CompareRegisterValueType_RegisterRelAddr:
|
||||
cond_address = this->registers[cur_opcode.begin_reg_cond.addr_reg_index] + cur_opcode.begin_reg_cond.rel_address;
|
||||
cond_address = m_registers[cur_opcode.begin_reg_cond.addr_reg_index] + cur_opcode.begin_reg_cond.rel_address;
|
||||
break;
|
||||
case CompareRegisterValueType_RegisterOfsReg:
|
||||
cond_address = this->registers[cur_opcode.begin_reg_cond.addr_reg_index] + this->registers[cur_opcode.begin_reg_cond.ofs_reg_index];
|
||||
cond_address = m_registers[cur_opcode.begin_reg_cond.addr_reg_index] + m_registers[cur_opcode.begin_reg_cond.ofs_reg_index];
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
@ -1182,17 +1182,17 @@ namespace ams::dmnt::cheat::impl {
|
|||
/* Save or restore a register. */
|
||||
switch (cur_opcode.save_restore_reg.op_type) {
|
||||
case SaveRestoreRegisterOpType_ClearRegs:
|
||||
this->registers[cur_opcode.save_restore_reg.dst_index] = 0ul;
|
||||
m_registers[cur_opcode.save_restore_reg.dst_index] = 0ul;
|
||||
break;
|
||||
case SaveRestoreRegisterOpType_ClearSaved:
|
||||
this->saved_values[cur_opcode.save_restore_reg.dst_index] = 0ul;
|
||||
m_saved_values[cur_opcode.save_restore_reg.dst_index] = 0ul;
|
||||
break;
|
||||
case SaveRestoreRegisterOpType_Save:
|
||||
this->saved_values[cur_opcode.save_restore_reg.dst_index] = this->registers[cur_opcode.save_restore_reg.src_index];
|
||||
m_saved_values[cur_opcode.save_restore_reg.dst_index] = m_registers[cur_opcode.save_restore_reg.src_index];
|
||||
break;
|
||||
case SaveRestoreRegisterOpType_Restore:
|
||||
default:
|
||||
this->registers[cur_opcode.save_restore_reg.dst_index] = this->saved_values[cur_opcode.save_restore_reg.src_index];
|
||||
m_registers[cur_opcode.save_restore_reg.dst_index] = m_saved_values[cur_opcode.save_restore_reg.src_index];
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
|
@ -1203,14 +1203,14 @@ namespace ams::dmnt::cheat::impl {
|
|||
switch (cur_opcode.save_restore_regmask.op_type) {
|
||||
case SaveRestoreRegisterOpType_ClearSaved:
|
||||
case SaveRestoreRegisterOpType_Save:
|
||||
src = this->registers;
|
||||
dst = this->saved_values;
|
||||
src = m_registers;
|
||||
dst = m_saved_values;
|
||||
break;
|
||||
case SaveRestoreRegisterOpType_ClearRegs:
|
||||
case SaveRestoreRegisterOpType_Restore:
|
||||
default:
|
||||
src = this->saved_values;
|
||||
dst = this->registers;
|
||||
src = m_saved_values;
|
||||
dst = m_registers;
|
||||
break;
|
||||
}
|
||||
for (size_t i = 0; i < NumRegisters; i++) {
|
||||
|
|
@ -1232,10 +1232,10 @@ namespace ams::dmnt::cheat::impl {
|
|||
case CheatVmOpcodeType_ReadWriteStaticRegister:
|
||||
if (cur_opcode.rw_static_reg.static_idx < NumReadableStaticRegisters) {
|
||||
/* Load a register with a static register. */
|
||||
this->registers[cur_opcode.rw_static_reg.idx] = this->static_registers[cur_opcode.rw_static_reg.static_idx];
|
||||
m_registers[cur_opcode.rw_static_reg.idx] = m_static_registers[cur_opcode.rw_static_reg.static_idx];
|
||||
} else {
|
||||
/* Store a register to a static register. */
|
||||
this->static_registers[cur_opcode.rw_static_reg.static_idx] = this->registers[cur_opcode.rw_static_reg.idx];
|
||||
m_static_registers[cur_opcode.rw_static_reg.static_idx] = m_registers[cur_opcode.rw_static_reg.idx];
|
||||
}
|
||||
break;
|
||||
case CheatVmOpcodeType_PauseProcess:
|
||||
|
|
@ -1251,16 +1251,16 @@ namespace ams::dmnt::cheat::impl {
|
|||
if (cur_opcode.debug_log.val_type == DebugLogValueType_RegisterValue) {
|
||||
switch (cur_opcode.debug_log.bit_width) {
|
||||
case 1:
|
||||
log_value = static_cast<u8>(this->registers[cur_opcode.debug_log.val_reg_index] & 0xFFul);
|
||||
log_value = static_cast<u8>(m_registers[cur_opcode.debug_log.val_reg_index] & 0xFFul);
|
||||
break;
|
||||
case 2:
|
||||
log_value = static_cast<u16>(this->registers[cur_opcode.debug_log.val_reg_index] & 0xFFFFul);
|
||||
log_value = static_cast<u16>(m_registers[cur_opcode.debug_log.val_reg_index] & 0xFFFFul);
|
||||
break;
|
||||
case 4:
|
||||
log_value = static_cast<u32>(this->registers[cur_opcode.debug_log.val_reg_index] & 0xFFFFFFFFul);
|
||||
log_value = static_cast<u32>(m_registers[cur_opcode.debug_log.val_reg_index] & 0xFFFFFFFFul);
|
||||
break;
|
||||
case 8:
|
||||
log_value = static_cast<u64>(this->registers[cur_opcode.debug_log.val_reg_index] & 0xFFFFFFFFFFFFFFFFul);
|
||||
log_value = static_cast<u64>(m_registers[cur_opcode.debug_log.val_reg_index] & 0xFFFFFFFFFFFFFFFFul);
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
|
|
@ -1270,13 +1270,13 @@ namespace ams::dmnt::cheat::impl {
|
|||
val_address = GetCheatProcessAddress(metadata, cur_opcode.debug_log.mem_type, cur_opcode.debug_log.rel_address);
|
||||
break;
|
||||
case DebugLogValueType_MemoryOfsReg:
|
||||
val_address = GetCheatProcessAddress(metadata, cur_opcode.debug_log.mem_type, this->registers[cur_opcode.debug_log.ofs_reg_index]);
|
||||
val_address = GetCheatProcessAddress(metadata, cur_opcode.debug_log.mem_type, m_registers[cur_opcode.debug_log.ofs_reg_index]);
|
||||
break;
|
||||
case DebugLogValueType_RegisterRelAddr:
|
||||
val_address = this->registers[cur_opcode.debug_log.addr_reg_index] + cur_opcode.debug_log.rel_address;
|
||||
val_address = m_registers[cur_opcode.debug_log.addr_reg_index] + cur_opcode.debug_log.rel_address;
|
||||
break;
|
||||
case DebugLogValueType_RegisterOfsReg:
|
||||
val_address = this->registers[cur_opcode.debug_log.addr_reg_index] + this->registers[cur_opcode.debug_log.ofs_reg_index];
|
||||
val_address = m_registers[cur_opcode.debug_log.addr_reg_index] + m_registers[cur_opcode.debug_log.ofs_reg_index];
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue