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exo2: minor fixes, now completes main and receives SMCs on hw

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This commit is contained in:
Michael Scire 2020-05-14 13:06:15 -07:00 • committed by SciresM
parent 27843314a4
commit 8c4c1db506
11 changed files with 134 additions and 47 deletions
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37
libraries/libexosphere/include/exosphere/mmu/mmu_api.arch.arm64.hpp
View file

@ -201,22 +201,29 @@ namespace ams::mmu::arch::arm64 {
return ((address >> L3EntryShift) & TableEntryIndexMask);
}
constexpr ALWAYS_INLINE void SetTableImpl(u64 *table, u64 index, u64 value) {
/* Ensure (for constexpr validation purposes) that the entry we set is clear. */
if (table[index]) {
__builtin_unreachable();
}
/* Set the value. */
constexpr ALWAYS_INLINE void SetTableEntryImpl(volatile u64 *table, u64 index, u64 value) {
/* Write the value. */
table[index] = value;
}
constexpr ALWAYS_INLINE void SetTableEntry(u64 *table, u64 index, u64 value) {
/* Ensure (for constexpr validation purposes) that the entry we set is clear. */
if (std::is_constant_evaluated()) {
if (table[index]) {
__builtin_unreachable();
}
}
/* Set the value. */
SetTableEntryImpl(table, index, value);
}
constexpr void SetL1TableEntry(u64 *table, uintptr_t virt_addr, uintptr_t phys_addr, PageTableTableAttribute attr) {
SetTableImpl(table, GetL1EntryIndex(virt_addr), MakeTableEntry(phys_addr & TableEntryMask, attr));
SetTableEntry(table, GetL1EntryIndex(virt_addr), MakeTableEntry(phys_addr & TableEntryMask, attr));
}
constexpr void SetL2TableEntry(u64 *table, uintptr_t virt_addr, uintptr_t phys_addr, PageTableTableAttribute attr) {
SetTableImpl(table, GetL2EntryIndex(virt_addr), MakeTableEntry(phys_addr & TableEntryMask, attr));
SetTableEntry(table, GetL2EntryIndex(virt_addr), MakeTableEntry(phys_addr & TableEntryMask, attr));
}
constexpr void SetL1BlockEntry(u64 *table, uintptr_t virt_addr, uintptr_t phys_addr, size_t size, PageTableMappingAttribute attr) {
@ -224,7 +231,7 @@ namespace ams::mmu::arch::arm64 {
const u64 count = (size >> L1EntryShift);
for (u64 i = 0; i < count; ++i) {
SetTableImpl(table, start + i, MakeL1BlockEntry((phys_addr & L1EntryMask) + (i << L1EntryShift), attr));
SetTableEntry(table, start + i, MakeL1BlockEntry((phys_addr & L1EntryMask) + (i << L1EntryShift), attr));
}
}
@ -233,7 +240,7 @@ namespace ams::mmu::arch::arm64 {
const u64 count = (size >> L2EntryShift);
for (u64 i = 0; i < count; ++i) {
SetTableImpl(table, start + i, MakeL2BlockEntry((phys_addr & L2EntryMask) + (i << L2EntryShift), attr));
SetTableEntry(table, start + i, MakeL2BlockEntry((phys_addr & L2EntryMask) + (i << L2EntryShift), attr));
}
}
@ -242,11 +249,11 @@ namespace ams::mmu::arch::arm64 {
const u64 count = (size >> L3EntryShift);
for (u64 i = 0; i < count; ++i) {
SetTableImpl(table, start + i, MakeL3BlockEntry((phys_addr & L3EntryMask) + (i << L3EntryShift), attr));
SetTableEntry(table, start + i, MakeL3BlockEntry((phys_addr & L3EntryMask) + (i << L3EntryShift), attr));
}
}
constexpr void InvalidateL1Entries(u64 *table, uintptr_t virt_addr, size_t size) {
constexpr void InvalidateL1Entries(volatile u64 *table, uintptr_t virt_addr, size_t size) {
const u64 start = GetL1EntryIndex(virt_addr);
const u64 count = (size >> L1EntryShift);
const u64 end = start + count;
@ -256,7 +263,7 @@ namespace ams::mmu::arch::arm64 {
}
}
constexpr void InvalidateL2Entries(u64 *table, uintptr_t virt_addr, size_t size) {
constexpr void InvalidateL2Entries(volatile u64 *table, uintptr_t virt_addr, size_t size) {
const u64 start = GetL2EntryIndex(virt_addr);
const u64 count = (size >> L2EntryShift);
const u64 end = start + count;
@ -266,7 +273,7 @@ namespace ams::mmu::arch::arm64 {
}
}
constexpr void InvalidateL3Entries(u64 *table, uintptr_t virt_addr, size_t size) {
constexpr void InvalidateL3Entries(volatile u64 *table, uintptr_t virt_addr, size_t size) {
const u64 start = GetL3EntryIndex(virt_addr);
const u64 count = (size >> L3EntryShift);
const u64 end = start + count;

10
libraries/libexosphere/include/exosphere/secmon/secmon_configuration_context.arch.arm64.hpp
View file

@ -30,17 +30,17 @@ namespace ams::secmon {
EmummcConfiguration emummc_cfg;
u8 _raw_emummc_config[0x120];
};
union {
u8 _misc_data[0x400 - sizeof(_raw_exosphere_config) - sizeof(_raw_emummc_config)];
};
u8 sealed_device_keys[pkg1::KeyGeneration_Max][se::AesBlockSize];
u8 sealed_master_keys[pkg1::KeyGeneration_Max][se::AesBlockSize];
pkg1::BootConfig boot_config;
u8 rsa_private_exponents[4][se::RsaSize];
union {
u8 _misc_data[0xFC0 - sizeof(_raw_exosphere_config) - sizeof(_raw_emummc_config) - sizeof(sealed_device_keys) - sizeof(sealed_master_keys) - sizeof(boot_config) - sizeof(rsa_private_exponents)];
};
/* u8 l1_page_table[0x40]; */
};
static_assert(sizeof(ConfigurationContext) == 0x1000);
static_assert(sizeof(ConfigurationContext) == 0xFC0);
static_assert(util::is_pod<ConfigurationContext>::value);
static_assert(offsetof(ConfigurationContext, sealed_device_keys) == 0x400);
namespace impl {