boot: implement ConfigurePinmux

This commit is contained in:
Michael Scire 2019-05-03 06:20:50 -07:00
parent 4ca53e2ef1
commit 4ef7b83e34
12 changed files with 1829 additions and 37 deletions

View file

@ -13,7 +13,7 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "boot_functions.hpp"
#include "boot_gpio_map.hpp"
@ -24,7 +24,7 @@ static inline u32 GetGpioPadDescriptor(u32 gpio_pad_name) {
if (gpio_pad_name >= GpioPadNameMax) {
std::abort();
}
return GpioMap[gpio_pad_name];
}
@ -53,16 +53,16 @@ u32 Boot::GpioConfigure(u32 gpio_pad_name) {
/* Convert the GPIO pad descriptor into its register offset */
u32 gpio_reg_offset = (((gpio_pad_desc << 0x03) & 0xFFFFFF00) | ((gpio_pad_desc >> 0x01) & 0x0C));
/* Extract the bit and lock values from the GPIO pad descriptor */
u32 gpio_cnf_val = ((0x01 << ((gpio_pad_desc & 0x07) | 0x08)) | (0x01 << (gpio_pad_desc & 0x07)));
/* Write to the appropriate GPIO_CNF_x register (upper offset) */
*(reinterpret_cast<volatile u32 *>(gpio_base_vaddr + gpio_reg_offset + 0x80)) = gpio_cnf_val;
/* Do a dummy read from GPIO_CNF_x register (lower offset) */
gpio_cnf_val = *(reinterpret_cast<volatile u32 *>(gpio_base_vaddr + gpio_reg_offset));
return gpio_cnf_val;
}
@ -71,24 +71,24 @@ u32 Boot::GpioSetDirection(u32 gpio_pad_name, GpioDirection dir) {
/* Fetch this GPIO's pad descriptor */
const u32 gpio_pad_desc = GetGpioPadDescriptor(gpio_pad_name);
/* Discard invalid GPIOs */
if (gpio_pad_desc == GpioInvalid) {
return GpioInvalid;
}
/* Convert the GPIO pad descriptor into its register offset */
u32 gpio_reg_offset = (((gpio_pad_desc << 0x03) & 0xFFFFFF00) | ((gpio_pad_desc >> 0x01) & 0x0C));
/* Set the direction bit and lock values */
u32 gpio_oe_val = ((0x01 << ((gpio_pad_desc & 0x07) | 0x08)) | (static_cast<u32>(dir) << (gpio_pad_desc & 0x07)));
/* Write to the appropriate GPIO_OE_x register (upper offset) */
*(reinterpret_cast<volatile u32 *>(gpio_base_vaddr + gpio_reg_offset + 0x90)) = gpio_oe_val;
/* Do a dummy read from GPIO_OE_x register (lower offset) */
gpio_oe_val = *(reinterpret_cast<volatile u32 *>(gpio_base_vaddr + gpio_reg_offset));
return gpio_oe_val;
}
@ -97,23 +97,23 @@ u32 Boot::GpioSetValue(u32 gpio_pad_name, GpioValue val) {
/* Fetch this GPIO's pad descriptor */
const u32 gpio_pad_desc = GetGpioPadDescriptor(gpio_pad_name);
/* Discard invalid GPIOs */
if (gpio_pad_desc == GpioInvalid) {
return GpioInvalid;
}
/* Convert the GPIO pad descriptor into its register offset */
u32 gpio_reg_offset = (((gpio_pad_desc << 0x03) & 0xFFFFFF00) | ((gpio_pad_desc >> 0x01) & 0x0C));
/* Set the output bit and lock values */
u32 gpio_out_val = ((0x01 << ((gpio_pad_desc & 0x07) | 0x08)) | (static_cast<u32>(val) << (gpio_pad_desc & 0x07)));
/* Write to the appropriate GPIO_OUT_x register (upper offset) */
*(reinterpret_cast<volatile u32 *>(gpio_base_vaddr + gpio_reg_offset + 0xA0)) = gpio_out_val;
/* Do a dummy read from GPIO_OUT_x register (lower offset) */
gpio_out_val = *(reinterpret_cast<volatile u32 *>(gpio_base_vaddr + gpio_reg_offset));
return gpio_out_val;
}