mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2025-06-02 23:59:49 -04:00
kern: kern::arm64 -> kern::arch::arm64
This commit is contained in:
Michael Scire
parent
11f70759ce
commit
20b5268e90
47 changed files with 192 additions and 192 deletions
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@ -98,11 +98,11 @@ vector_entry serror_sp0
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/* Current EL, SPx */
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vector_entry synch_spx
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clrex
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b _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv
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b _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv
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check_vector_size synch_spx
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vector_entry irq_spx
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b _ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv
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b _ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv
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check_vector_size irq_spx
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vector_entry fiq_spx
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@ -114,18 +114,18 @@ vector_entry fiq_spx
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vector_entry serror_spx
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clrex
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nop
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b _ZN3ams4kern5arm6421EL1SystemErrorHandlerEv
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b _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv
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check_vector_size serror_spx
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/* Lower EL, A64 */
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vector_entry synch_a64
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clrex
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b _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv
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b _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv
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check_vector_size synch_a64
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vector_entry irq_a64
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clrex
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b _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv
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b _ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv
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check_vector_size irq_a64
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vector_entry fiq_a64
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@ -137,18 +137,18 @@ vector_entry fiq_a64
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vector_entry serror_a64
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clrex
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nop
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b _ZN3ams4kern5arm6421EL0SystemErrorHandlerEv
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b _ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv
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check_vector_size serror_a64
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/* Lower EL, A32 */
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vector_entry synch_a32
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clrex
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b _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv
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b _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv
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check_vector_size synch_a32
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vector_entry irq_a32
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clrex
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b _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv
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b _ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv
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check_vector_size irq_a32
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vector_entry fiq_a32
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@ -160,5 +160,5 @@ vector_entry fiq_a32
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vector_entry serror_a32
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clrex
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nop
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b _ZN3ams4kern5arm6421EL0SystemErrorHandlerEv
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b _ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv
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check_vector_size serror_a32
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@ -90,7 +90,7 @@ namespace ams::kern::init {
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g_initial_page_allocator.Initialize(initial_page_allocator_state);
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/* Ensure that the T1SZ is correct (and what we expect). */
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MESOSPHERE_INIT_ABORT_UNLESS((cpu::TranslationControlRegisterAccessor().GetT1Size() / arm64::L1BlockSize) == arm64::MaxPageTableEntries);
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MESOSPHERE_INIT_ABORT_UNLESS((cpu::TranslationControlRegisterAccessor().GetT1Size() / arch::arm64::L1BlockSize) == arch::arm64::MaxPageTableEntries);
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/* Create page table object for use during initialization. */
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KInitialPageTable ttbr1_table(util::AlignDown(cpu::GetTtbr1El1(), PageSize), KInitialPageTable::NoClear{});
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@ -215,7 +215,7 @@ _ZN3ams4kern4init16JumpFromEL2ToEL1Ev:
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msr elr_el2, x30
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/* Flush the entire data cache and invalidate the entire TLB. */
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bl _ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv
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bl _ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv
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/* Setup system registers for deprivileging. */
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/* ACTLR_EL2: */
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@ -262,7 +262,7 @@ _ZN3ams4kern4init19DisableMmuAndCachesEv:
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mov x22, x30
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/* Flush the entire data cache and invalidate the entire TLB. */
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bl _ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv
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bl _ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv
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/* Invalidate the instruction cache, and ensure instruction consistency. */
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ic ialluis
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@ -282,22 +282,22 @@ _ZN3ams4kern4init19DisableMmuAndCachesEv:
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mov x30, x22
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ret
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/* ams::kern::arm64::cpu::FlushEntireDataCacheWithoutStack() */
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.section .crt0.text._ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv, "ax", %progbits
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.global _ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv
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.type _ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv, %function
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_ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv:
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/* ams::kern::arch::arm64::cpu::FlushEntireDataCacheWithoutStack() */
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.section .crt0.text._ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv, "ax", %progbits
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.global _ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv
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.type _ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv, %function
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_ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv:
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/* The stack isn't set up, so we'll need to trash a register. */
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mov x23, x30
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/* Ensure that the cache is coherent. */
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bl _ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
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bl _ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
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dsb sy
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bl _ZN3ams4kern5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv
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bl _ZN3ams4kern4arch5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv
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dsb sy
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bl _ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
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bl _ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
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dsb sy
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/* Invalidate the entire TLB, and ensure instruction consistency. */
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@ -308,11 +308,11 @@ _ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv:
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mov x30, x23
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ret
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/* ams::kern::arm64::cpu::FlushEntireDataCacheLocalWithoutStack() */
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.section .crt0.text._ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv, "ax", %progbits
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.global _ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
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.type _ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv, %function
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_ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv:
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/* ams::kern::arch::arm64::cpu::FlushEntireDataCacheLocalWithoutStack() */
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.section .crt0.text._ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv, "ax", %progbits
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.global _ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
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.type _ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv, %function
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_ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv:
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/* The stack isn't set up, so we'll need to trash a register. */
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mov x24, x30
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@ -331,7 +331,7 @@ begin_flush_cache_local_loop:
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/* FlushEntireDataCacheImplWithoutStack(level); */
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mov w0, w9
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bl _ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
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bl _ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
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/* level--; */
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sub w9, w9, #1
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@ -343,11 +343,11 @@ done_flush_cache_local_loop:
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mov x30, x24
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ret
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/* ams::kern::arm64::cpu::FlushEntireDataCacheSharedWithoutStack() */
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.section .crt0.text._ZN3ams4kern5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv, "ax", %progbits
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.global _ZN3ams4kern5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv
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.type _ZN3ams4kern5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv, %function
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_ZN3ams4kern5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv:
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/* ams::kern::arch::arm64::cpu::FlushEntireDataCacheSharedWithoutStack() */
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.section .crt0.text._ZN3ams4kern4arch5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv, "ax", %progbits
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.global _ZN3ams4kern4arch5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv
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.type _ZN3ams4kern4arch5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv, %function
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_ZN3ams4kern4arch5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv:
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/* The stack isn't set up, so we'll need to trash a register. */
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mov x24, x30
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@ -367,7 +367,7 @@ begin_flush_cache_shared_loop:
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/* FlushEntireDataCacheImplWithoutStack(level); */
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mov w0, w9
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bl _ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
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bl _ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
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/* level--; */
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sub w9, w9, #1
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@ -379,11 +379,11 @@ done_flush_cache_shared_loop:
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mov x30, x24
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ret
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/* ams::kern::arm64::cpu::FlushEntireDataCacheImplWithoutStack() */
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.section .crt0.text._ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv, "ax", %progbits
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.global _ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
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.type _ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv, %function
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_ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv:
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/* ams::kern::arch::arm64::cpu::FlushEntireDataCacheImplWithoutStack() */
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.section .crt0.text._ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv, "ax", %progbits
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.global _ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
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.type _ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv, %function
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_ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv:
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/* const u64 level_sel_value = static_cast<u64>(level << 1); */
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lsl w6, w0, #1
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sxtw x6, w6
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@ -14,11 +14,11 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* ams::kern::arm64::EL1IrqExceptionHandler() */
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.section .text._ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv, "ax", %progbits
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.global _ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv
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.type _ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv, %function
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_ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv:
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/* ams::kern::arch::arm64::EL1IrqExceptionHandler() */
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.section .text._ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv, "ax", %progbits
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.global _ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv
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.type _ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv, %function
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_ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv:
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/* Save registers that need saving. */
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sub sp, sp, #(8 * 24)
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@ -43,7 +43,7 @@ _ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv:
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/* Invoke KInterruptManager::HandleInterrupt(bool user_mode). */
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mrs x18, tpidr_el1
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mov x0, #0
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bl _ZN3ams4kern5arm6417KInterruptManager15HandleInterruptEb
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bl _ZN3ams4kern4arch5arm6417KInterruptManager15HandleInterruptEb
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/* Restore registers that we saved. */
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msr sp_el0, x19
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@ -68,11 +68,11 @@ _ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv:
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/* Return from the exception. */
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eret
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/* ams::kern::arm64::EL0IrqExceptionHandler() */
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.section .text._ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv, "ax", %progbits
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.global _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv
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.type _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv, %function
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_ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv:
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/* ams::kern::arch::arm64::EL0IrqExceptionHandler() */
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.section .text._ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv, "ax", %progbits
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.global _ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv
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.type _ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv, %function
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_ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv:
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/* Save registers that need saving. */
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sub sp, sp, #(8 * 36)
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@ -104,7 +104,7 @@ _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv:
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/* Invoke KInterruptManager::HandleInterrupt(bool user_mode). */
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mrs x18, tpidr_el1
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mov x0, #1
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bl _ZN3ams4kern5arm6417KInterruptManager15HandleInterruptEb
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bl _ZN3ams4kern4arch5arm6417KInterruptManager15HandleInterruptEb
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/* Restore state from the context. */
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ldp x30, x20, [sp, #(8 * 30)]
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@ -134,11 +134,11 @@ _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv:
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/* Return from the exception. */
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eret
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/* ams::kern::arm64::EL0SynchronousExceptionHandler() */
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.section .text._ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv, "ax", %progbits
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.global _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv
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.type _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv, %function
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_ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv:
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/* ams::kern::arch::arm64::EL0SynchronousExceptionHandler() */
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.section .text._ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv, "ax", %progbits
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.global _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv
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.type _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv, %function
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_ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv:
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/* Save x16 and x17, so that we can use them as scratch. */
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stp x16, x17, [sp, #-16]!
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@ -198,10 +198,10 @@ _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv:
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stp x21, x22, [sp, #(8 * 32)]
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str x23, [sp, #(8 * 34)]
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/* Call ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *) */
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/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
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mrs x18, tpidr_el1
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mov x0, sp
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bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
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bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
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/* Restore state from the context. */
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ldp x30, x20, [sp, #(8 * 30)]
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@ -233,15 +233,15 @@ _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv:
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2: /* SVC from aarch32. */
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ldp x16, x17, [sp], 16
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b _ZN3ams4kern5arm6412SvcHandler32Ev
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b _ZN3ams4kern4arch5arm6412SvcHandler32Ev
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3: /* SVC from aarch64. */
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ldp x16, x17, [sp], 16
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b _ZN3ams4kern5arm6412SvcHandler64Ev
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b _ZN3ams4kern4arch5arm6412SvcHandler64Ev
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4: /* FPU exception. */
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ldp x16, x17, [sp], 16
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b _ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv
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b _ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv
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5: /* Check if there's a TLB conflict that caused the abort. */
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and x17, x16, #0x3F
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@ -278,11 +278,11 @@ _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv:
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eret
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/* ams::kern::arm64::EL1SynchronousExceptionHandler() */
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.section .text._ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv, "ax", %progbits
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.global _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv
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.type _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv, %function
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_ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv:
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/* ams::kern::arch::arm64::EL1SynchronousExceptionHandler() */
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.section .text._ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv, "ax", %progbits
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.global _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv
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.type _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv, %function
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_ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv:
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/* Nintendo uses the "unused" virtual timer compare value as a scratch register. */
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msr cntv_cval_el0, x0
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@ -324,10 +324,10 @@ _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv:
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/* Data abort. Check if it was from trying to access userspace memory. */
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mrs x1, elr_el1
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adr x0, _ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv
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adr x0, _ZN3ams4kern4arch5arm6438UserspaceMemoryAccessFunctionAreaBeginEv
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cmp x1, x0
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b.lo 3f
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adr x0, _ZN3ams4kern5arm6436UserspaceMemoryAccessFunctionAreaEndEv
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adr x0, _ZN3ams4kern4arch5arm6436UserspaceMemoryAccessFunctionAreaEndEv
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cmp x1, x0
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b.hs 3f
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@ -387,10 +387,10 @@ _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv:
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stp x21, x22, [sp, #(8 * 32)]
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str x23, [sp, #(8 * 34)]
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/* Call ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *) */
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/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
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mrs x18, tpidr_el1
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mov x0, sp
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bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
|
||||
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
|
||||
|
||||
4: /* HandleException should never return. The best we can do is infinite loop. */
|
||||
b 4b
|
||||
|
|
@ -434,11 +434,11 @@ _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv:
|
|||
eret
|
||||
|
||||
|
||||
/* ams::kern::arm64::FpuAccessExceptionHandler() */
|
||||
.section .text._ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv, "ax", %progbits
|
||||
.global _ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv
|
||||
.type _ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv, %function
|
||||
_ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv:
|
||||
/* ams::kern::arch::arm64::FpuAccessExceptionHandler() */
|
||||
.section .text._ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv, "ax", %progbits
|
||||
.global _ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv
|
||||
.type _ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv, %function
|
||||
_ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv:
|
||||
/* Save registers that need saving. */
|
||||
sub sp, sp, #(8 * 24)
|
||||
|
||||
|
|
@ -461,7 +461,7 @@ _ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv:
|
|||
mrs x21, spsr_el1
|
||||
|
||||
/* Invoke the FPU context switch handler. */
|
||||
bl _ZN3ams4kern5arm6423FpuContextSwitchHandlerEv
|
||||
bl _ZN3ams4kern4arch5arm6423FpuContextSwitchHandlerEv
|
||||
|
||||
/* Restore registers that we saved. */
|
||||
msr sp_el0, x19
|
||||
|
|
@ -486,11 +486,11 @@ _ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv:
|
|||
/* Return from the exception. */
|
||||
eret
|
||||
|
||||
/* ams::kern::arm64::EL1SystemErrorHandler() */
|
||||
.section .text._ZN3ams4kern5arm6421EL1SystemErrorHandlerEv, "ax", %progbits
|
||||
.global _ZN3ams4kern5arm6421EL1SystemErrorHandlerEv
|
||||
.type _ZN3ams4kern5arm6421EL1SystemErrorHandlerEv, %function
|
||||
_ZN3ams4kern5arm6421EL1SystemErrorHandlerEv:
|
||||
/* ams::kern::arch::arm64::EL1SystemErrorHandler() */
|
||||
.section .text._ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv, "ax", %progbits
|
||||
.global _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv
|
||||
.type _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv, %function
|
||||
_ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv:
|
||||
/* Nintendo uses the "unused" virtual timer compare value as a scratch register. */
|
||||
msr cntv_cval_el0, x0
|
||||
|
||||
|
|
@ -533,10 +533,10 @@ _ZN3ams4kern5arm6421EL1SystemErrorHandlerEv:
|
|||
stp x21, x22, [sp, #(8 * 32)]
|
||||
str x23, [sp, #(8 * 34)]
|
||||
|
||||
/* Invoke ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *). */
|
||||
/* Invoke ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *). */
|
||||
mrs x18, tpidr_el1
|
||||
mov x0, sp
|
||||
bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
|
||||
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
|
||||
|
||||
1: /* HandleException should never return. The best we can do is infinite loop. */
|
||||
b 1b
|
||||
|
|
@ -544,11 +544,11 @@ _ZN3ams4kern5arm6421EL1SystemErrorHandlerEv:
|
|||
/* Return from the exception. */
|
||||
eret
|
||||
|
||||
/* ams::kern::arm64::EL0SystemErrorHandler() */
|
||||
.section .text._ZN3ams4kern5arm6421EL0SystemErrorHandlerEv, "ax", %progbits
|
||||
.global _ZN3ams4kern5arm6421EL0SystemErrorHandlerEv
|
||||
.type _ZN3ams4kern5arm6421EL0SystemErrorHandlerEv, %function
|
||||
_ZN3ams4kern5arm6421EL0SystemErrorHandlerEv:
|
||||
/* ams::kern::arch::arm64::EL0SystemErrorHandler() */
|
||||
.section .text._ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv, "ax", %progbits
|
||||
.global _ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv
|
||||
.type _ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv, %function
|
||||
_ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv:
|
||||
/* Create a KExceptionContext to pass to HandleException. */
|
||||
sub sp, sp, #0x120
|
||||
stp x0, x1, [sp, #(8 * 0)]
|
||||
|
|
@ -575,10 +575,10 @@ _ZN3ams4kern5arm6421EL0SystemErrorHandlerEv:
|
|||
stp x21, x22, [sp, #(8 * 32)]
|
||||
str x23, [sp, #(8 * 34)]
|
||||
|
||||
/* Invoke ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *). */
|
||||
/* Invoke ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *). */
|
||||
mrs x18, tpidr_el1
|
||||
mov x0, sp
|
||||
bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
|
||||
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
|
||||
|
||||
/* Restore state from the context. */
|
||||
ldp x30, x20, [sp, #(8 * 30)]
|
||||
|
|
|
|||
|
|
@ -14,11 +14,11 @@
|
|||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/* ams::kern::arm64::UserModeThreadStarter() */
|
||||
.section .text._ZN3ams4kern5arm6421UserModeThreadStarterEv, "ax", %progbits
|
||||
.global _ZN3ams4kern5arm6421UserModeThreadStarterEv
|
||||
.type _ZN3ams4kern5arm6421UserModeThreadStarterEv, %function
|
||||
_ZN3ams4kern5arm6421UserModeThreadStarterEv:
|
||||
/* ams::kern::arch::arm64::UserModeThreadStarter() */
|
||||
.section .text._ZN3ams4kern4arch5arm6421UserModeThreadStarterEv, "ax", %progbits
|
||||
.global _ZN3ams4kern4arch5arm6421UserModeThreadStarterEv
|
||||
.type _ZN3ams4kern4arch5arm6421UserModeThreadStarterEv, %function
|
||||
_ZN3ams4kern4arch5arm6421UserModeThreadStarterEv:
|
||||
/* NOTE: Stack layout on entry looks like following: */
|
||||
/* SP */
|
||||
/* | */
|
||||
|
|
@ -28,8 +28,8 @@ _ZN3ams4kern5arm6421UserModeThreadStarterEv:
|
|||
/* Clear the disable count for this thread's stack parameters. */
|
||||
str wzr, [sp, #(0x120 + 0x18)]
|
||||
|
||||
/* Call ams::kern::arm64::OnThreadStart() */
|
||||
bl _ZN3ams4kern5arm6413OnThreadStartEv
|
||||
/* Call ams::kern::arch::arm64::OnThreadStart() */
|
||||
bl _ZN3ams4kern4arch5arm6413OnThreadStartEv
|
||||
|
||||
/* Restore thread state from the KExceptionContext on stack */
|
||||
ldp x30, x19, [sp, #(8 * 30)] /* x30 = lr, x19 = sp */
|
||||
|
|
@ -63,11 +63,11 @@ _ZN3ams4kern5arm6421UserModeThreadStarterEv:
|
|||
/* Return to EL0 */
|
||||
eret
|
||||
|
||||
/* ams::kern::arm64::SupervisorModeThreadStarter() */
|
||||
.section .text._ZN3ams4kern5arm6427SupervisorModeThreadStarterEv, "ax", %progbits
|
||||
.global _ZN3ams4kern5arm6427SupervisorModeThreadStarterEv
|
||||
.type _ZN3ams4kern5arm6427SupervisorModeThreadStarterEv, %function
|
||||
_ZN3ams4kern5arm6427SupervisorModeThreadStarterEv:
|
||||
/* ams::kern::arch::arm64::SupervisorModeThreadStarter() */
|
||||
.section .text._ZN3ams4kern4arch5arm6427SupervisorModeThreadStarterEv, "ax", %progbits
|
||||
.global _ZN3ams4kern4arch5arm6427SupervisorModeThreadStarterEv
|
||||
.type _ZN3ams4kern4arch5arm6427SupervisorModeThreadStarterEv, %function
|
||||
_ZN3ams4kern4arch5arm6427SupervisorModeThreadStarterEv:
|
||||
/* NOTE: Stack layout on entry looks like following: */
|
||||
/* SP */
|
||||
/* | */
|
||||
|
|
@ -88,11 +88,11 @@ _ZN3ams4kern5arm6427SupervisorModeThreadStarterEv:
|
|||
eret
|
||||
|
||||
|
||||
/* ams::kern::arm64::KThreadContext::RestoreFpuRegisters64(const KThreadContext &) */
|
||||
.section .text._ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_, "ax", %progbits
|
||||
.global _ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_
|
||||
.type _ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_, %function
|
||||
_ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_:
|
||||
/* ams::kern::arch::arm64::KThreadContext::RestoreFpuRegisters64(const KThreadContext &) */
|
||||
.section .text._ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_, "ax", %progbits
|
||||
.global _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_
|
||||
.type _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_, %function
|
||||
_ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_:
|
||||
/* Load and restore FPCR and FPSR from the context. */
|
||||
ldr x1, [x0, #0x70]
|
||||
msr fpcr, x1
|
||||
|
|
@ -119,11 +119,11 @@ _ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_:
|
|||
|
||||
ret
|
||||
|
||||
/* ams::kern::arm64::KThreadContext::RestoreFpuRegisters32(const KThreadContext &) */
|
||||
.section .text._ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_, "ax", %progbits
|
||||
.global _ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_
|
||||
.type _ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_, %function
|
||||
_ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_:
|
||||
/* ams::kern::arch::arm64::KThreadContext::RestoreFpuRegisters32(const KThreadContext &) */
|
||||
.section .text._ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_, "ax", %progbits
|
||||
.global _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_
|
||||
.type _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_, %function
|
||||
_ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_:
|
||||
/* Load and restore FPCR and FPSR from the context. */
|
||||
ldr x1, [x0, #0x70]
|
||||
msr fpcr, x1
|
||||
|
|
|
|||
|
|
@ -14,11 +14,11 @@
|
|||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/* ams::kern::arm64::UserspaceMemoryAccessFunctionAreaBegin() */
|
||||
.section .text._ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv, "ax", %progbits
|
||||
.global _ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv
|
||||
.type _ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv, %function
|
||||
_ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv:
|
||||
/* ams::kern::arch::arm64::UserspaceMemoryAccessFunctionAreaBegin() */
|
||||
.section .text._ZN3ams4kern4arch5arm6438UserspaceMemoryAccessFunctionAreaBeginEv, "ax", %progbits
|
||||
.global _ZN3ams4kern4arch5arm6438UserspaceMemoryAccessFunctionAreaBeginEv
|
||||
.type _ZN3ams4kern4arch5arm6438UserspaceMemoryAccessFunctionAreaBeginEv, %function
|
||||
_ZN3ams4kern4arch5arm6438UserspaceMemoryAccessFunctionAreaBeginEv:
|
||||
/* NOTE: This is not a real function, and only exists as a label for safety. */
|
||||
|
||||
/* ================ All Userspace Memory Functions after this line. ================ */
|
||||
|
|
@ -27,9 +27,9 @@ _ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv:
|
|||
|
||||
/* ================ All Userspace Memory Functions before this line. ================ */
|
||||
|
||||
/* ams::kern::arm64::UserspaceMemoryAccessFunctionAreaEnd() */
|
||||
.section .text._ZN3ams4kern5arm6436UserspaceMemoryAccessFunctionAreaEndEv, "ax", %progbits
|
||||
.global _ZN3ams4kern5arm6436UserspaceMemoryAccessFunctionAreaEndEv
|
||||
.type _ZN3ams4kern5arm6436UserspaceMemoryAccessFunctionAreaEndEv, %function
|
||||
_ZN3ams4kern5arm6436UserspaceMemoryAccessFunctionAreaEndEv:
|
||||
/* ams::kern::arch::arm64::UserspaceMemoryAccessFunctionAreaEnd() */
|
||||
.section .text._ZN3ams4kern4arch5arm6436UserspaceMemoryAccessFunctionAreaEndEv, "ax", %progbits
|
||||
.global _ZN3ams4kern4arch5arm6436UserspaceMemoryAccessFunctionAreaEndEv
|
||||
.type _ZN3ams4kern4arch5arm6436UserspaceMemoryAccessFunctionAreaEndEv, %function
|
||||
_ZN3ams4kern4arch5arm6436UserspaceMemoryAccessFunctionAreaEndEv:
|
||||
/* NOTE: This is not a real function, and only exists as a label for safety. */
|
||||
Loading…
Add table
Add a link
Reference in a new issue