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https://github.com/Atmosphere-NX/Atmosphere.git
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kern: kern::arm64 -> kern::arch::arm64
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parent
11f70759ce
commit
20b5268e90
47 changed files with 192 additions and 192 deletions
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@ -15,7 +15,7 @@
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*/
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#include <mesosphere.hpp>
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namespace ams::kern::arm64::cpu {
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namespace ams::kern::arch::arm64::cpu {
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/* Declare prototype to be implemented in asm. */
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void SynchronizeAllCoresImpl(s32 *sync_var, s32 num_cores);
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@ -14,11 +14,11 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* ams::kern::arm64::cpu::SynchronizeAllCoresImpl(int *sync_var, int num_cores) */
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.section .text._ZN3ams4kern5arm643cpu23SynchronizeAllCoresImplEPii, "ax", %progbits
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.global _ZN3ams4kern5arm643cpu23SynchronizeAllCoresImplEPii
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.type _ZN3ams4kern5arm643cpu23SynchronizeAllCoresImplEPii, %function
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_ZN3ams4kern5arm643cpu23SynchronizeAllCoresImplEPii:
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/* ams::kern::arch::arm64::cpu::SynchronizeAllCoresImpl(int *sync_var, int num_cores) */
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.section .text._ZN3ams4kern4arch5arm643cpu23SynchronizeAllCoresImplEPii, "ax", %progbits
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.global _ZN3ams4kern4arch5arm643cpu23SynchronizeAllCoresImplEPii
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.type _ZN3ams4kern4arch5arm643cpu23SynchronizeAllCoresImplEPii, %function
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_ZN3ams4kern4arch5arm643cpu23SynchronizeAllCoresImplEPii:
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/* Loop until the sync var is less than num cores. */
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sevl
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1:
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@ -63,11 +63,11 @@ _ZN3ams4kern5arm643cpu23SynchronizeAllCoresImplEPii:
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ret
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/* ams::kern::arm64::cpu::ClearPageToZero(void *) */
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.section .text._ZN3ams4kern5arm643cpu19ClearPageToZeroImplEPv, "ax", %progbits
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.global _ZN3ams4kern5arm643cpu19ClearPageToZeroImplEPv
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.type _ZN3ams4kern5arm643cpu19ClearPageToZeroImplEPv, %function
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_ZN3ams4kern5arm643cpu19ClearPageToZeroImplEPv:
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/* ams::kern::arch::arm64::cpu::ClearPageToZero(void *) */
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.section .text._ZN3ams4kern4arch5arm643cpu19ClearPageToZeroImplEPv, "ax", %progbits
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.global _ZN3ams4kern4arch5arm643cpu19ClearPageToZeroImplEPv
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.type _ZN3ams4kern4arch5arm643cpu19ClearPageToZeroImplEPv, %function
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_ZN3ams4kern4arch5arm643cpu19ClearPageToZeroImplEPv:
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/* Efficiently clear the page using dc zva. */
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dc zva, x0
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add x8, x0, #0x040
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@ -15,7 +15,7 @@
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*/
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#include <mesosphere.hpp>
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namespace ams::kern::arm64 {
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namespace ams::kern::arch::arm64 {
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namespace {
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@ -15,7 +15,7 @@
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*/
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#include <mesosphere.hpp>
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namespace ams::kern::arm64 {
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namespace ams::kern::arch::arm64 {
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namespace impl {
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@ -15,7 +15,7 @@
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*/
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#include <mesosphere.hpp>
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namespace ams::kern::arm64 {
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namespace ams::kern::arch::arm64 {
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void KInterruptController::SetupInterruptLines(s32 core_id) const {
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const size_t ITLines = (core_id == 0) ? 32 * ((this->gicd->typer & 0x1F) + 1) : NumLocalInterrupts;
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@ -15,7 +15,7 @@
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*/
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#include <mesosphere.hpp>
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namespace ams::kern::arm64 {
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namespace ams::kern::arch::arm64 {
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/* Instantiate static members in specific translation unit. */
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KSpinLock KInterruptManager::s_lock;
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*/
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#include <mesosphere.hpp>
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namespace ams::kern::arm64 {
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namespace ams::kern::arch::arm64 {
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void KPageTable::Initialize(s32 core_id) {
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/* Nothing actually needed here. */
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*/
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#include <mesosphere.hpp>
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namespace ams::kern::arm64 {
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namespace ams::kern::arch::arm64 {
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void KPageTableImpl::InitializeForKernel(void *tb, KVirtualAddress start, KVirtualAddress end) {
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this->table = static_cast<L1PageTableEntry *>(tb);
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*/
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#include <mesosphere.hpp>
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namespace ams::kern::arm64 {
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namespace ams::kern::arch::arm64 {
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void KSupervisorPageTable::Initialize(s32 core_id) {
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/* Get the identity mapping ttbr0. */
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*/
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#include <mesosphere.hpp>
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namespace ams::kern::arm64 {
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namespace ams::kern::arch::arm64 {
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/* These are implemented elsewhere (asm). */
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void UserModeThreadStarter();
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/* Determine LR and SP. */
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if (is_user) {
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/* Usermode thread. */
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this->lr = reinterpret_cast<uintptr_t>(::ams::kern::arm64::UserModeThreadStarter);
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this->lr = reinterpret_cast<uintptr_t>(::ams::kern::arch::arm64::UserModeThreadStarter);
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this->sp = SetupStackForUserModeThreadStarter(u_pc, k_sp, u_sp, arg, is_64_bit);
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} else {
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/* Kernel thread. */
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this->sp = GetInteger(k_sp);
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} else {
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/* Generic Kernel thread. */
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this->lr = reinterpret_cast<uintptr_t>(::ams::kern::arm64::SupervisorModeThreadStarter);
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this->lr = reinterpret_cast<uintptr_t>(::ams::kern::arch::arm64::SupervisorModeThreadStarter);
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this->sp = SetupStackForSupervisorModeThreadStarter(u_pc, k_sp, arg);
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}
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}
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* ams::kern::arm64::SvcHandler64() */
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.section .text._ZN3ams4kern5arm6412SvcHandler64Ev, "ax", %progbits
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.global _ZN3ams4kern5arm6412SvcHandler64Ev
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.type _ZN3ams4kern5arm6412SvcHandler64Ev, %function
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_ZN3ams4kern5arm6412SvcHandler64Ev:
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/* ams::kern::arch::arm64::SvcHandler64() */
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.section .text._ZN3ams4kern4arch5arm6412SvcHandler64Ev, "ax", %progbits
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.global _ZN3ams4kern4arch5arm6412SvcHandler64Ev
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.type _ZN3ams4kern4arch5arm6412SvcHandler64Ev, %function
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_ZN3ams4kern4arch5arm6412SvcHandler64Ev:
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/* Create a KExceptionContext for the exception. */
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sub sp, sp, #0x120
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stp x26, x27, [sp, #(8 * 26)]
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stp x28, x29, [sp, #(8 * 28)]
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/* Call ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *) */
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/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
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mrs x18, tpidr_el1
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mov x0, sp
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bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
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bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
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/* Restore registers. */
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ldp x30, x8, [sp, #(8 * 30)]
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add sp, sp, #0x120
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eret
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/* ams::kern::arm64::SvcHandler32() */
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.section .text._ZN3ams4kern5arm6412SvcHandler32Ev, "ax", %progbits
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.global _ZN3ams4kern5arm6412SvcHandler32Ev
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.type _ZN3ams4kern5arm6412SvcHandler32Ev, %function
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_ZN3ams4kern5arm6412SvcHandler32Ev:
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/* ams::kern::arch::arm64::SvcHandler32() */
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.section .text._ZN3ams4kern4arch5arm6412SvcHandler32Ev, "ax", %progbits
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.global _ZN3ams4kern4arch5arm6412SvcHandler32Ev
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.type _ZN3ams4kern4arch5arm6412SvcHandler32Ev, %function
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_ZN3ams4kern4arch5arm6412SvcHandler32Ev:
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/* Ensure that our registers are 32-bit. */
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mov w0, w0
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mov w1, w1
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stp xzr, xzr, [sp, #(8 * 28)]
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stp xzr, xzr, [sp, #(8 * 30)]
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/* Call ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *) */
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/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
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mrs x18, tpidr_el1
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mov x0, sp
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bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
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bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
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/* Restore registers. */
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ldp x17, x20, [sp, #(8 * 32)]
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