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kern: use different psr masks for 64 and 32-bit El0 threads

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This commit is contained in:
Michael Scire 2023-02-21 03:20:49 -07:00
parent fd7a93a15f
commit 154d61f55f
4 changed files with 13 additions and 16 deletions
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10
libraries/libmesosphere/source/arch/arm64/kern_exception_handlers.cpp
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@ -25,8 +25,6 @@ namespace ams::kern::arch::arm64 {
namespace {
constexpr inline u32 El0PsrMask = 0xFF0FFE20;
enum EsrEc : u32 {
EsrEc_Unknown = 0b000000,
EsrEc_WaitForInterruptOrEvent = 0b000001,
@ -134,7 +132,7 @@ namespace ams::kern::arch::arm64 {
info->sp = context->sp;
info->lr = context->x[30];
info->pc = context->pc;
info->pstate = (context->psr & El0PsrMask);
info->pstate = (context->psr & cpu::El0Aarch64PsrMask);
info->afsr0 = afsr0;
info->afsr1 = afsr1;
info->esr = esr;
@ -151,7 +149,7 @@ namespace ams::kern::arch::arm64 {
info->pc = context->pc;
info->flags = 1;
info->status_64.pstate = (context->psr & El0PsrMask);
info->status_64.pstate = (context->psr & cpu::El0Aarch32PsrMask);
info->status_64.afsr0 = afsr0;
info->status_64.afsr1 = afsr1;
info->status_64.esr = esr;
@ -399,7 +397,7 @@ namespace ams::kern::arch::arm64 {
e_ctx->x[30] = info.info64.lr;
e_ctx->sp = info.info64.sp;
e_ctx->pc = info.info64.pc;
e_ctx->psr = (info.info64.pstate & El0PsrMask) | (e_ctx->psr & ~El0PsrMask);
e_ctx->psr = (info.info64.pstate & cpu::El0Aarch64PsrMask) | (e_ctx->psr & ~cpu::El0Aarch64PsrMask);
} else {
for (size_t i = 0; i < util::size(info.info32.r); ++i) {
e_ctx->x[i] = info.info32.r[i];
@ -407,7 +405,7 @@ namespace ams::kern::arch::arm64 {
e_ctx->x[14] = info.info32.lr;
e_ctx->x[13] = info.info32.sp;
e_ctx->pc = info.info32.pc;
e_ctx->psr = (info.info32.status_64.pstate & El0PsrMask) | (e_ctx->psr & ~El0PsrMask);
e_ctx->psr = (info.info32.status_64.pstate & cpu::El0Aarch32PsrMask) | (e_ctx->psr & ~cpu::El0Aarch32PsrMask);
}
/* Note that PC was adjusted. */