mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2025-06-01 07:18:22 -04:00
kern: mostly kill magic numbers in assembly, fix SVCs >= 0x80
This commit is contained in:
Michael Scire
parent
9e563d590b
commit
037b04ac60
15 changed files with 747 additions and 504 deletions
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@ -13,6 +13,7 @@
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <mesosphere/kern_select_assembly_offsets.h>
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/* For some reason GAS doesn't know about it, even with .cpu cortex-a57 */
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#define cpuactlr_el1 s3_1_c15_c2_0
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@ -157,13 +158,13 @@ othercore_el1:
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bl _ZN3ams4kern4init19DisableMmuAndCachesEv
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/* Setup system registers using values from our KInitArguments. */
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ldr x1, [x20, #0x00]
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ldr x1, [x20, #(INIT_ARGUMENTS_TTBR0)]
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msr ttbr0_el1, x1
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ldr x1, [x20, #0x08]
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ldr x1, [x20, #(INIT_ARGUMENTS_TTBR1)]
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msr ttbr1_el1, x1
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ldr x1, [x20, #0x10]
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ldr x1, [x20, #(INIT_ARGUMENTS_TCR)]
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msr tcr_el1, x1
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ldr x1, [x20, #0x18]
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ldr x1, [x20, #(INIT_ARGUMENTS_MAIR)]
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msr mair_el1, x1
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/* Perform cpu-specific setup. */
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@ -179,9 +180,9 @@ othercore_el1:
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b othercore_cpu_specific_setup_end
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othercore_cpu_specific_setup_cortex_a57:
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othercore_cpu_specific_setup_cortex_a53:
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ldr x1, [x20, #0x20]
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ldr x1, [x20, #(INIT_ARGUMENTS_CPUACTLR)]
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msr cpuactlr_el1, x1
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ldr x1, [x20, #0x28]
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ldr x1, [x20, #(INIT_ARGUMENTS_CPUECTLR)]
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msr cpuectlr_el1, x1
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othercore_cpu_specific_setup_end:
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@ -190,14 +191,14 @@ othercore_cpu_specific_setup_end:
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isb
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/* Set sctlr_el1 and ensure instruction consistency. */
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ldr x1, [x20, #0x30]
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ldr x1, [x20, #(INIT_ARGUMENTS_SCTLR)]
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msr sctlr_el1, x1
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dsb sy
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isb
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/* Jump to the virtual address equivalent to ams::kern::init::InvokeEntrypoint */
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ldr x1, [x20, #0x50]
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ldr x1, [x20, #(INIT_ARGUMENTS_SETUP_FUNCTION)]
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adr x2, _ZN3ams4kern4init14StartOtherCoreEPKNS1_14KInitArgumentsE
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sub x1, x1, x2
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adr x2, _ZN3ams4kern4init16InvokeEntrypointEPKNS1_14KInitArgumentsE
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@ -218,7 +219,7 @@ _ZN3ams4kern4init16InvokeEntrypointEPKNS1_14KInitArgumentsE:
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isb
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/* Setup the stack pointer. */
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ldr x1, [x20, #0x38]
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ldr x1, [x20, #(INIT_ARGUMENTS_SP)]
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mov sp, x1
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/* Ensure that system debug registers are setup. */
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@ -228,12 +229,12 @@ _ZN3ams4kern4init16InvokeEntrypointEPKNS1_14KInitArgumentsE:
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bl _ZN3ams4kern4init26InitializeExceptionVectorsEv
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/* Setup the exception stack in cntv_cval_el0. */
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ldr x1, [x20, #0x58]
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ldr x1, [x20, #(INIT_ARGUMENTS_EXCEPTION_STACK)]
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msr cntv_cval_el0, x1
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/* Jump to the entrypoint. */
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ldr x1, [x20, #0x40]
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ldr x0, [x20, #0x48]
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ldr x1, [x20, #(INIT_ARGUMENTS_ENTRYPOINT)]
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ldr x0, [x20, #(INIT_ARGUMENTS_ARGUMENT)]
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br x1
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@ -72,62 +72,66 @@ _ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv:
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.type _ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv, %function
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_ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv:
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/* Save registers that need saving. */
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sub sp, sp, #0x120
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sub sp, sp, #(EXCEPTION_CONTEXT_SIZE)
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stp x0, x1, [sp, #(8 * 0)]
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stp x2, x3, [sp, #(8 * 2)]
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stp x4, x5, [sp, #(8 * 4)]
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stp x6, x7, [sp, #(8 * 6)]
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stp x8, x9, [sp, #(8 * 8)]
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stp x10, x11, [sp, #(8 * 10)]
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stp x12, x13, [sp, #(8 * 12)]
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stp x14, x15, [sp, #(8 * 14)]
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stp x16, x17, [sp, #(8 * 16)]
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stp x18, x19, [sp, #(8 * 18)]
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stp x20, x21, [sp, #(8 * 20)]
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stp x22, x23, [sp, #(8 * 22)]
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stp x24, x25, [sp, #(8 * 24)]
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stp x26, x27, [sp, #(8 * 26)]
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stp x28, x29, [sp, #(8 * 28)]
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stp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
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stp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
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stp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
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stp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
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stp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
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stp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
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stp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
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stp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
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stp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
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stp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
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stp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
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stp x22, x23, [sp, #(EXCEPTION_CONTEXT_X22_X23)]
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stp x24, x25, [sp, #(EXCEPTION_CONTEXT_X24_X25)]
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stp x26, x27, [sp, #(EXCEPTION_CONTEXT_X26_X27)]
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stp x28, x29, [sp, #(EXCEPTION_CONTEXT_X28_X29)]
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mrs x20, sp_el0
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mrs x21, elr_el1
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mrs x22, spsr_el1
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mrs x23, tpidr_el0
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mov w22, w22
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stp x30, x20, [sp, #(8 * 30)]
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stp x21, x22, [sp, #(8 * 32)]
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str x23, [sp, #(8 * 34)]
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stp x30, x20, [sp, #(EXCEPTION_CONTEXT_X30_SP)]
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stp x21, x22, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
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str x23, [sp, #(EXCEPTION_CONTEXT_TPIDR)]
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/* Invoke KInterruptManager::HandleInterrupt(bool user_mode). */
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ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
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ldr x18, [sp, #(EXCEPTION_CONTEXT_SIZE + THREAD_STACK_PARAMETERS_CUR_THREAD)]
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mov x0, #1
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bl _ZN3ams4kern4arch5arm6417KInterruptManager15HandleInterruptEb
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/* Restore state from the context. */
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ldp x30, x20, [sp, #(8 * 30)]
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ldp x21, x22, [sp, #(8 * 32)]
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ldr x23, [sp, #(8 * 34)]
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ldp x30, x20, [sp, #(EXCEPTION_CONTEXT_X30_SP)]
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ldp x21, x22, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
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ldr x23, [sp, #(EXCEPTION_CONTEXT_TPIDR)]
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msr sp_el0, x20
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msr elr_el1, x21
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msr spsr_el1, x22
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msr tpidr_el0, x23
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ldp x0, x1, [sp, #(8 * 0)]
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ldp x2, x3, [sp, #(8 * 2)]
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ldp x4, x5, [sp, #(8 * 4)]
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ldp x6, x7, [sp, #(8 * 6)]
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ldp x8, x9, [sp, #(8 * 8)]
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ldp x10, x11, [sp, #(8 * 10)]
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ldp x12, x13, [sp, #(8 * 12)]
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ldp x14, x15, [sp, #(8 * 14)]
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ldp x16, x17, [sp, #(8 * 16)]
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ldp x18, x19, [sp, #(8 * 18)]
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ldp x20, x21, [sp, #(8 * 20)]
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ldp x22, x23, [sp, #(8 * 22)]
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ldp x24, x25, [sp, #(8 * 24)]
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ldp x26, x27, [sp, #(8 * 26)]
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ldp x28, x29, [sp, #(8 * 28)]
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add sp, sp, #0x120
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ldp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
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ldp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
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ldp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
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ldp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
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ldp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
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ldp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
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ldp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
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ldp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
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ldp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
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ldp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
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ldp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
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ldp x22, x23, [sp, #(EXCEPTION_CONTEXT_X22_X23)]
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ldp x24, x25, [sp, #(EXCEPTION_CONTEXT_X24_X25)]
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ldp x26, x27, [sp, #(EXCEPTION_CONTEXT_X26_X27)]
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ldp x28, x29, [sp, #(EXCEPTION_CONTEXT_X28_X29)]
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add sp, sp, #(EXCEPTION_CONTEXT_SIZE)
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/* Return from the exception. */
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eret
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@ -171,60 +175,65 @@ _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv:
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ldp x16, x17, [sp], 16
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/* Create a KExceptionContext to pass to HandleException. */
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sub sp, sp, #0x120
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stp x0, x1, [sp, #(8 * 0)]
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stp x2, x3, [sp, #(8 * 2)]
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stp x4, x5, [sp, #(8 * 4)]
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stp x6, x7, [sp, #(8 * 6)]
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stp x8, x9, [sp, #(8 * 8)]
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stp x10, x11, [sp, #(8 * 10)]
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stp x12, x13, [sp, #(8 * 12)]
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stp x14, x15, [sp, #(8 * 14)]
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stp x16, x17, [sp, #(8 * 16)]
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stp x18, x19, [sp, #(8 * 18)]
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stp x20, x21, [sp, #(8 * 20)]
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stp x22, x23, [sp, #(8 * 22)]
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stp x24, x25, [sp, #(8 * 24)]
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stp x26, x27, [sp, #(8 * 26)]
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stp x28, x29, [sp, #(8 * 28)]
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sub sp, sp, #(EXCEPTION_CONTEXT_SIZE)
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stp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
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stp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
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stp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
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stp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
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stp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
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stp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
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stp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
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stp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
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stp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
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stp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
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stp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
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stp x22, x23, [sp, #(EXCEPTION_CONTEXT_X22_X23)]
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stp x24, x25, [sp, #(EXCEPTION_CONTEXT_X24_X25)]
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stp x26, x27, [sp, #(EXCEPTION_CONTEXT_X26_X27)]
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stp x28, x29, [sp, #(EXCEPTION_CONTEXT_X28_X29)]
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mrs x20, sp_el0
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mrs x21, elr_el1
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mrs x22, spsr_el1
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mrs x23, tpidr_el0
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mov w22, w22
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stp x30, x20, [sp, #(8 * 30)]
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stp x21, x22, [sp, #(8 * 32)]
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str x23, [sp, #(8 * 34)]
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stp x30, x20, [sp, #(EXCEPTION_CONTEXT_X30_SP)]
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stp x21, x22, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
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str x23, [sp, #(EXCEPTION_CONTEXT_TPIDR)]
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/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
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ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
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ldr x18, [sp, #(EXCEPTION_CONTEXT_SIZE + THREAD_STACK_PARAMETERS_CUR_THREAD)]
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mov x0, sp
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bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
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/* Restore state from the context. */
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ldp x30, x20, [sp, #(8 * 30)]
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ldp x21, x22, [sp, #(8 * 32)]
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ldr x23, [sp, #(8 * 34)]
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ldp x30, x20, [sp, #(EXCEPTION_CONTEXT_X30_SP)]
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ldp x21, x22, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
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ldr x23, [sp, #(EXCEPTION_CONTEXT_TPIDR)]
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msr sp_el0, x20
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msr elr_el1, x21
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msr spsr_el1, x22
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msr tpidr_el0, x23
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ldp x0, x1, [sp, #(8 * 0)]
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ldp x2, x3, [sp, #(8 * 2)]
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ldp x4, x5, [sp, #(8 * 4)]
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ldp x6, x7, [sp, #(8 * 6)]
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ldp x8, x9, [sp, #(8 * 8)]
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ldp x10, x11, [sp, #(8 * 10)]
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ldp x12, x13, [sp, #(8 * 12)]
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ldp x14, x15, [sp, #(8 * 14)]
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ldp x16, x17, [sp, #(8 * 16)]
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ldp x18, x19, [sp, #(8 * 18)]
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ldp x20, x21, [sp, #(8 * 20)]
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ldp x22, x23, [sp, #(8 * 22)]
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ldp x24, x25, [sp, #(8 * 24)]
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ldp x26, x27, [sp, #(8 * 26)]
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ldp x28, x29, [sp, #(8 * 28)]
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add sp, sp, #0x120
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ldp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
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ldp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
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ldp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
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ldp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
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ldp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
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ldp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
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ldp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
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ldp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
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ldp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
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ldp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
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ldp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
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ldp x22, x23, [sp, #(EXCEPTION_CONTEXT_X22_X23)]
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ldp x24, x25, [sp, #(EXCEPTION_CONTEXT_X24_X25)]
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ldp x26, x27, [sp, #(EXCEPTION_CONTEXT_X26_X27)]
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ldp x28, x29, [sp, #(EXCEPTION_CONTEXT_X28_X29)]
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add sp, sp, #(EXCEPTION_CONTEXT_SIZE)
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/* Return from the exception. */
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eret
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@ -344,30 +353,33 @@ _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv:
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ldr x1, [sp, #16]
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/* Create a KExceptionContext to pass to HandleException. */
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sub sp, sp, #0x120
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stp x0, x1, [sp, #(8 * 0)]
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stp x2, x3, [sp, #(8 * 2)]
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stp x4, x5, [sp, #(8 * 4)]
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stp x6, x7, [sp, #(8 * 6)]
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stp x8, x9, [sp, #(8 * 8)]
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stp x10, x11, [sp, #(8 * 10)]
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stp x12, x13, [sp, #(8 * 12)]
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stp x14, x15, [sp, #(8 * 14)]
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stp x16, x17, [sp, #(8 * 16)]
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stp x18, x19, [sp, #(8 * 18)]
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stp x20, x21, [sp, #(8 * 20)]
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stp x22, x23, [sp, #(8 * 22)]
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stp x24, x25, [sp, #(8 * 24)]
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stp x26, x27, [sp, #(8 * 26)]
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stp x28, x29, [sp, #(8 * 28)]
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sub sp, sp, #(EXCEPTION_CONTEXT_SIZE)
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stp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
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stp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
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stp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
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stp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
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stp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
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stp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
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stp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
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stp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
|
||||
stp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
|
||||
stp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
|
||||
stp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
|
||||
stp x22, x23, [sp, #(EXCEPTION_CONTEXT_X22_X23)]
|
||||
stp x24, x25, [sp, #(EXCEPTION_CONTEXT_X24_X25)]
|
||||
stp x26, x27, [sp, #(EXCEPTION_CONTEXT_X26_X27)]
|
||||
stp x28, x29, [sp, #(EXCEPTION_CONTEXT_X28_X29)]
|
||||
|
||||
mrs x20, sp_el0
|
||||
mrs x21, elr_el1
|
||||
mrs x22, spsr_el1
|
||||
mrs x23, tpidr_el0
|
||||
mov w22, w22
|
||||
stp x30, x20, [sp, #(8 * 30)]
|
||||
stp x21, x22, [sp, #(8 * 32)]
|
||||
str x23, [sp, #(8 * 34)]
|
||||
|
||||
stp x30, x20, [sp, #(EXCEPTION_CONTEXT_X30_SP)]
|
||||
stp x21, x22, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
|
||||
str x23, [sp, #(EXCEPTION_CONTEXT_TPIDR)]
|
||||
|
||||
/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
|
||||
mov x0, sp
|
||||
|
|
@ -421,53 +433,53 @@ _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv:
|
|||
.type _ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv, %function
|
||||
_ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv:
|
||||
/* Save registers that need saving. */
|
||||
sub sp, sp, #0x120
|
||||
sub sp, sp, #(EXCEPTION_CONTEXT_SIZE)
|
||||
|
||||
stp x0, x1, [sp, #(8 * 0)]
|
||||
stp x2, x3, [sp, #(8 * 2)]
|
||||
stp x4, x5, [sp, #(8 * 4)]
|
||||
stp x6, x7, [sp, #(8 * 6)]
|
||||
stp x8, x9, [sp, #(8 * 8)]
|
||||
stp x10, x11, [sp, #(8 * 10)]
|
||||
stp x12, x13, [sp, #(8 * 12)]
|
||||
stp x14, x15, [sp, #(8 * 14)]
|
||||
stp x16, x17, [sp, #(8 * 16)]
|
||||
stp x18, x19, [sp, #(8 * 18)]
|
||||
stp x20, x21, [sp, #(8 * 20)]
|
||||
stp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
|
||||
stp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
|
||||
stp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
|
||||
stp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
|
||||
stp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
|
||||
stp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
|
||||
stp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
|
||||
stp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
|
||||
stp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
|
||||
stp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
|
||||
stp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
|
||||
|
||||
mrs x19, sp_el0
|
||||
mrs x20, elr_el1
|
||||
mrs x21, spsr_el1
|
||||
mov w21, w21
|
||||
|
||||
stp x30, x19, [sp, #(8 * 30)]
|
||||
stp x20, x21, [sp, #(8 * 32)]
|
||||
stp x30, x19, [sp, #(EXCEPTION_CONTEXT_X30_SP)]
|
||||
stp x20, x21, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
|
||||
|
||||
/* Invoke the FPU context switch handler. */
|
||||
ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
|
||||
ldr x18, [sp, #(EXCEPTION_CONTEXT_SIZE + THREAD_STACK_PARAMETERS_CUR_THREAD)]
|
||||
bl _ZN3ams4kern4arch5arm6423FpuContextSwitchHandlerEv
|
||||
|
||||
/* Restore registers that we saved. */
|
||||
ldp x30, x19, [sp, #(8 * 30)]
|
||||
ldp x20, x21, [sp, #(8 * 32)]
|
||||
ldp x30, x19, [sp, #(EXCEPTION_CONTEXT_X30_SP)]
|
||||
ldp x20, x21, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
|
||||
|
||||
msr sp_el0, x19
|
||||
msr elr_el1, x20
|
||||
msr spsr_el1, x21
|
||||
|
||||
ldp x0, x1, [sp, #(8 * 0)]
|
||||
ldp x2, x3, [sp, #(8 * 2)]
|
||||
ldp x4, x5, [sp, #(8 * 4)]
|
||||
ldp x6, x7, [sp, #(8 * 6)]
|
||||
ldp x8, x9, [sp, #(8 * 8)]
|
||||
ldp x10, x11, [sp, #(8 * 10)]
|
||||
ldp x12, x13, [sp, #(8 * 12)]
|
||||
ldp x14, x15, [sp, #(8 * 14)]
|
||||
ldp x16, x17, [sp, #(8 * 16)]
|
||||
ldp x18, x19, [sp, #(8 * 18)]
|
||||
ldp x20, x21, [sp, #(8 * 20)]
|
||||
ldp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
|
||||
ldp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
|
||||
ldp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
|
||||
ldp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
|
||||
ldp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
|
||||
ldp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
|
||||
ldp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
|
||||
ldp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
|
||||
ldp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
|
||||
ldp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
|
||||
ldp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
|
||||
|
||||
add sp, sp, #0x120
|
||||
add sp, sp, #(EXCEPTION_CONTEXT_SIZE)
|
||||
|
||||
/* Return from the exception. */
|
||||
eret
|
||||
|
|
@ -495,30 +507,32 @@ _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv:
|
|||
mrs x0, tpidr_el1
|
||||
|
||||
/* Create a KExceptionContext to pass to HandleException. */
|
||||
sub sp, sp, #0x120
|
||||
stp x0, x1, [sp, #(8 * 0)]
|
||||
stp x2, x3, [sp, #(8 * 2)]
|
||||
stp x4, x5, [sp, #(8 * 4)]
|
||||
stp x6, x7, [sp, #(8 * 6)]
|
||||
stp x8, x9, [sp, #(8 * 8)]
|
||||
stp x10, x11, [sp, #(8 * 10)]
|
||||
stp x12, x13, [sp, #(8 * 12)]
|
||||
stp x14, x15, [sp, #(8 * 14)]
|
||||
stp x16, x17, [sp, #(8 * 16)]
|
||||
stp x18, x19, [sp, #(8 * 18)]
|
||||
stp x20, x21, [sp, #(8 * 20)]
|
||||
stp x22, x23, [sp, #(8 * 22)]
|
||||
stp x24, x25, [sp, #(8 * 24)]
|
||||
stp x26, x27, [sp, #(8 * 26)]
|
||||
stp x28, x29, [sp, #(8 * 28)]
|
||||
sub sp, sp, #(EXCEPTION_CONTEXT_SIZE)
|
||||
stp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
|
||||
stp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
|
||||
stp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
|
||||
stp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
|
||||
stp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
|
||||
stp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
|
||||
stp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
|
||||
stp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
|
||||
stp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
|
||||
stp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
|
||||
stp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
|
||||
stp x22, x23, [sp, #(EXCEPTION_CONTEXT_X22_X23)]
|
||||
stp x24, x25, [sp, #(EXCEPTION_CONTEXT_X24_X25)]
|
||||
stp x26, x27, [sp, #(EXCEPTION_CONTEXT_X26_X27)]
|
||||
stp x28, x29, [sp, #(EXCEPTION_CONTEXT_X28_X29)]
|
||||
|
||||
mrs x20, sp_el0
|
||||
mrs x21, elr_el1
|
||||
mrs x22, spsr_el1
|
||||
mrs x23, tpidr_el0
|
||||
mov w22, w22
|
||||
stp x30, x20, [sp, #(8 * 30)]
|
||||
stp x21, x22, [sp, #(8 * 32)]
|
||||
str x23, [sp, #(8 * 34)]
|
||||
|
||||
stp x30, x20, [sp, #(EXCEPTION_CONTEXT_X30_SP)]
|
||||
stp x21, x22, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
|
||||
str x23, [sp, #(EXCEPTION_CONTEXT_TPIDR)]
|
||||
|
||||
/* Invoke ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *). */
|
||||
mov x0, sp
|
||||
|
|
@ -533,60 +547,66 @@ _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv:
|
|||
.type _ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv, %function
|
||||
_ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv:
|
||||
/* Create a KExceptionContext to pass to HandleException. */
|
||||
sub sp, sp, #0x120
|
||||
stp x0, x1, [sp, #(8 * 0)]
|
||||
stp x2, x3, [sp, #(8 * 2)]
|
||||
stp x4, x5, [sp, #(8 * 4)]
|
||||
stp x6, x7, [sp, #(8 * 6)]
|
||||
stp x8, x9, [sp, #(8 * 8)]
|
||||
stp x10, x11, [sp, #(8 * 10)]
|
||||
stp x12, x13, [sp, #(8 * 12)]
|
||||
stp x14, x15, [sp, #(8 * 14)]
|
||||
stp x16, x17, [sp, #(8 * 16)]
|
||||
stp x18, x19, [sp, #(8 * 18)]
|
||||
stp x20, x21, [sp, #(8 * 20)]
|
||||
stp x22, x23, [sp, #(8 * 22)]
|
||||
stp x24, x25, [sp, #(8 * 24)]
|
||||
stp x26, x27, [sp, #(8 * 26)]
|
||||
stp x28, x29, [sp, #(8 * 28)]
|
||||
sub sp, sp, #(EXCEPTION_CONTEXT_SIZE)
|
||||
|
||||
stp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
|
||||
stp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
|
||||
stp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
|
||||
stp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
|
||||
stp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
|
||||
stp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
|
||||
stp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
|
||||
stp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
|
||||
stp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
|
||||
stp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
|
||||
stp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
|
||||
stp x22, x23, [sp, #(EXCEPTION_CONTEXT_X22_X23)]
|
||||
stp x24, x25, [sp, #(EXCEPTION_CONTEXT_X24_X25)]
|
||||
stp x26, x27, [sp, #(EXCEPTION_CONTEXT_X26_X27)]
|
||||
stp x28, x29, [sp, #(EXCEPTION_CONTEXT_X28_X29)]
|
||||
|
||||
mrs x20, sp_el0
|
||||
mrs x21, elr_el1
|
||||
mrs x22, spsr_el1
|
||||
mrs x23, tpidr_el0
|
||||
mov w22, w22
|
||||
stp x30, x20, [sp, #(8 * 30)]
|
||||
stp x21, x22, [sp, #(8 * 32)]
|
||||
str x23, [sp, #(8 * 34)]
|
||||
|
||||
stp x30, x20, [sp, #(EXCEPTION_CONTEXT_X30_SP)]
|
||||
stp x21, x22, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
|
||||
str x23, [sp, #(EXCEPTION_CONTEXT_TPIDR)]
|
||||
|
||||
/* Invoke ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *). */
|
||||
ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
|
||||
ldr x18, [sp, #(EXCEPTION_CONTEXT_SIZE + THREAD_STACK_PARAMETERS_CUR_THREAD)]
|
||||
mov x0, sp
|
||||
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
|
||||
|
||||
/* Restore state from the context. */
|
||||
ldp x30, x20, [sp, #(8 * 30)]
|
||||
ldp x21, x22, [sp, #(8 * 32)]
|
||||
ldr x23, [sp, #(8 * 34)]
|
||||
ldp x30, x20, [sp, #(EXCEPTION_CONTEXT_X30_SP)]
|
||||
ldp x21, x22, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
|
||||
ldr x23, [sp, #(EXCEPTION_CONTEXT_TPIDR)]
|
||||
|
||||
msr sp_el0, x20
|
||||
msr elr_el1, x21
|
||||
msr spsr_el1, x22
|
||||
msr tpidr_el0, x23
|
||||
ldp x0, x1, [sp, #(8 * 0)]
|
||||
ldp x2, x3, [sp, #(8 * 2)]
|
||||
ldp x4, x5, [sp, #(8 * 4)]
|
||||
ldp x6, x7, [sp, #(8 * 6)]
|
||||
ldp x8, x9, [sp, #(8 * 8)]
|
||||
ldp x10, x11, [sp, #(8 * 10)]
|
||||
ldp x12, x13, [sp, #(8 * 12)]
|
||||
ldp x14, x15, [sp, #(8 * 14)]
|
||||
ldp x16, x17, [sp, #(8 * 16)]
|
||||
ldp x18, x19, [sp, #(8 * 18)]
|
||||
ldp x20, x21, [sp, #(8 * 20)]
|
||||
ldp x22, x23, [sp, #(8 * 22)]
|
||||
ldp x24, x25, [sp, #(8 * 24)]
|
||||
ldp x26, x27, [sp, #(8 * 26)]
|
||||
ldp x28, x29, [sp, #(8 * 28)]
|
||||
add sp, sp, #0x120
|
||||
|
||||
ldp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
|
||||
ldp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
|
||||
ldp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
|
||||
ldp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
|
||||
ldp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
|
||||
ldp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
|
||||
ldp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
|
||||
ldp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
|
||||
ldp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
|
||||
ldp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
|
||||
ldp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
|
||||
ldp x22, x23, [sp, #(EXCEPTION_CONTEXT_X22_X23)]
|
||||
ldp x24, x25, [sp, #(EXCEPTION_CONTEXT_X24_X25)]
|
||||
ldp x26, x27, [sp, #(EXCEPTION_CONTEXT_X26_X27)]
|
||||
ldp x28, x29, [sp, #(EXCEPTION_CONTEXT_X28_X29)]
|
||||
|
||||
add sp, sp, #(EXCEPTION_CONTEXT_SIZE)
|
||||
|
||||
/* Return from the exception. */
|
||||
eret
|
||||
|
|
|
|||
|
|
@ -15,88 +15,88 @@
|
|||
*/
|
||||
#include <mesosphere/kern_select_assembly_offsets.h>
|
||||
|
||||
#define SAVE_THREAD_CONTEXT(ctx, tmp0, tmp1, done_label) \
|
||||
/* Save the callee save registers + SP and cpacr. */ \
|
||||
mov tmp0, sp; \
|
||||
mrs tmp1, cpacr_el1; \
|
||||
stp x19, x20, [ctx, #(8 * 0)]; \
|
||||
stp x21, x22, [ctx, #(8 * 2)]; \
|
||||
stp x23, x24, [ctx, #(8 * 4)]; \
|
||||
stp x25, x26, [ctx, #(8 * 6)]; \
|
||||
stp x27, x28, [ctx, #(8 * 8)]; \
|
||||
stp x29, x30, [ctx, #(8 * 10)]; \
|
||||
\
|
||||
stp tmp0, tmp1, [ctx, #0x60]; \
|
||||
\
|
||||
/* Check whether the FPU is enabled. */ \
|
||||
/* If it isn't, skip saving FPU state. */ \
|
||||
and tmp1, tmp1, #0x300000; \
|
||||
cbz tmp1, done_label; \
|
||||
\
|
||||
/* Save fpcr and fpsr. */ \
|
||||
mrs tmp0, fpcr; \
|
||||
mrs tmp1, fpsr; \
|
||||
stp tmp0, tmp1, [ctx, #0x70]; \
|
||||
\
|
||||
/* Save the FPU registers. */ \
|
||||
stp q0, q1, [ctx, #(16 * 0 + 0x80)]; \
|
||||
stp q2, q3, [ctx, #(16 * 2 + 0x80)]; \
|
||||
stp q4, q5, [ctx, #(16 * 4 + 0x80)]; \
|
||||
stp q6, q7, [ctx, #(16 * 6 + 0x80)]; \
|
||||
stp q8, q9, [ctx, #(16 * 8 + 0x80)]; \
|
||||
stp q10, q11, [ctx, #(16 * 10 + 0x80)]; \
|
||||
stp q12, q13, [ctx, #(16 * 12 + 0x80)]; \
|
||||
stp q14, q15, [ctx, #(16 * 14 + 0x80)]; \
|
||||
stp q16, q17, [ctx, #(16 * 16 + 0x80)]; \
|
||||
stp q18, q19, [ctx, #(16 * 18 + 0x80)]; \
|
||||
stp q20, q21, [ctx, #(16 * 20 + 0x80)]; \
|
||||
stp q22, q23, [ctx, #(16 * 22 + 0x80)]; \
|
||||
stp q24, q25, [ctx, #(16 * 24 + 0x80)]; \
|
||||
stp q26, q27, [ctx, #(16 * 26 + 0x80)]; \
|
||||
stp q28, q29, [ctx, #(16 * 28 + 0x80)]; \
|
||||
stp q30, q31, [ctx, #(16 * 30 + 0x80)];
|
||||
#define SAVE_THREAD_CONTEXT(ctx, tmp0, tmp1, done_label) \
|
||||
/* Save the callee save registers + SP and cpacr. */ \
|
||||
mov tmp0, sp; \
|
||||
mrs tmp1, cpacr_el1; \
|
||||
stp x19, x20, [ctx, #(THREAD_CONTEXT_X19_X20)]; \
|
||||
stp x21, x22, [ctx, #(THREAD_CONTEXT_X21_X22)]; \
|
||||
stp x23, x24, [ctx, #(THREAD_CONTEXT_X23_X24)]; \
|
||||
stp x25, x26, [ctx, #(THREAD_CONTEXT_X25_X26)]; \
|
||||
stp x27, x28, [ctx, #(THREAD_CONTEXT_X27_X28)]; \
|
||||
stp x29, x30, [ctx, #(THREAD_CONTEXT_X29_X30)]; \
|
||||
\
|
||||
stp tmp0, tmp1, [ctx, #(THREAD_CONTEXT_SP_CPACR)]; \
|
||||
\
|
||||
/* Check whether the FPU is enabled. */ \
|
||||
/* If it isn't, skip saving FPU state. */ \
|
||||
and tmp1, tmp1, #0x300000; \
|
||||
cbz tmp1, done_label; \
|
||||
\
|
||||
/* Save fpcr and fpsr. */ \
|
||||
mrs tmp0, fpcr; \
|
||||
mrs tmp1, fpsr; \
|
||||
stp tmp0, tmp1, [ctx, #(THREAD_CONTEXT_FPCR_FPSR)]; \
|
||||
\
|
||||
/* Save the FPU registers. */ \
|
||||
stp q0, q1, [ctx, #(16 * 0 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q2, q3, [ctx, #(16 * 2 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q4, q5, [ctx, #(16 * 4 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q6, q7, [ctx, #(16 * 6 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q8, q9, [ctx, #(16 * 8 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q10, q11, [ctx, #(16 * 10 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q12, q13, [ctx, #(16 * 12 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q14, q15, [ctx, #(16 * 14 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q16, q17, [ctx, #(16 * 16 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q18, q19, [ctx, #(16 * 18 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q20, q21, [ctx, #(16 * 20 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q22, q23, [ctx, #(16 * 22 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q24, q25, [ctx, #(16 * 24 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q26, q27, [ctx, #(16 * 26 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q28, q29, [ctx, #(16 * 28 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
stp q30, q31, [ctx, #(16 * 30 + THREAD_CONTEXT_FPU_REGISTERS)];
|
||||
|
||||
#define RESTORE_THREAD_CONTEXT(ctx, tmp0, tmp1, done_label) \
|
||||
/* Restore the callee save registers + SP and cpacr. */ \
|
||||
ldp tmp0, tmp1, [ctx, #0x60]; \
|
||||
mov sp, tmp0; \
|
||||
ldp x19, x20, [ctx, #(8 * 0)]; \
|
||||
ldp x21, x22, [ctx, #(8 * 2)]; \
|
||||
ldp x23, x24, [ctx, #(8 * 4)]; \
|
||||
ldp x25, x26, [ctx, #(8 * 6)]; \
|
||||
ldp x27, x28, [ctx, #(8 * 8)]; \
|
||||
ldp x29, x30, [ctx, #(8 * 10)]; \
|
||||
\
|
||||
msr cpacr_el1, tmp1; \
|
||||
isb; \
|
||||
\
|
||||
/* Check whether the FPU is enabled. */ \
|
||||
/* If it isn't, skip saving FPU state. */ \
|
||||
and tmp1, tmp1, #0x300000; \
|
||||
cbz tmp1, done_label; \
|
||||
\
|
||||
/* Save fpcr and fpsr. */ \
|
||||
ldp tmp0, tmp1, [ctx, #0x70]; \
|
||||
msr fpcr, tmp0; \
|
||||
msr fpsr, tmp1; \
|
||||
\
|
||||
/* Save the FPU registers. */ \
|
||||
ldp q0, q1, [ctx, #(16 * 0 + 0x80)]; \
|
||||
ldp q2, q3, [ctx, #(16 * 2 + 0x80)]; \
|
||||
ldp q4, q5, [ctx, #(16 * 4 + 0x80)]; \
|
||||
ldp q6, q7, [ctx, #(16 * 6 + 0x80)]; \
|
||||
ldp q8, q9, [ctx, #(16 * 8 + 0x80)]; \
|
||||
ldp q10, q11, [ctx, #(16 * 10 + 0x80)]; \
|
||||
ldp q12, q13, [ctx, #(16 * 12 + 0x80)]; \
|
||||
ldp q14, q15, [ctx, #(16 * 14 + 0x80)]; \
|
||||
ldp q16, q17, [ctx, #(16 * 16 + 0x80)]; \
|
||||
ldp q18, q19, [ctx, #(16 * 18 + 0x80)]; \
|
||||
ldp q20, q21, [ctx, #(16 * 20 + 0x80)]; \
|
||||
ldp q22, q23, [ctx, #(16 * 22 + 0x80)]; \
|
||||
ldp q24, q25, [ctx, #(16 * 24 + 0x80)]; \
|
||||
ldp q26, q27, [ctx, #(16 * 26 + 0x80)]; \
|
||||
ldp q28, q29, [ctx, #(16 * 28 + 0x80)]; \
|
||||
ldp q30, q31, [ctx, #(16 * 30 + 0x80)];
|
||||
#define RESTORE_THREAD_CONTEXT(ctx, tmp0, tmp1, done_label) \
|
||||
/* Restore the callee save registers + SP and cpacr. */ \
|
||||
ldp tmp0, tmp1, [ctx, #(THREAD_CONTEXT_SP_CPACR)]; \
|
||||
mov sp, tmp0; \
|
||||
ldp x19, x20, [ctx, #(THREAD_CONTEXT_X19_X20)]; \
|
||||
ldp x21, x22, [ctx, #(THREAD_CONTEXT_X21_X22)]; \
|
||||
ldp x23, x24, [ctx, #(THREAD_CONTEXT_X23_X24)]; \
|
||||
ldp x25, x26, [ctx, #(THREAD_CONTEXT_X25_X26)]; \
|
||||
ldp x27, x28, [ctx, #(THREAD_CONTEXT_X27_X28)]; \
|
||||
ldp x29, x30, [ctx, #(THREAD_CONTEXT_X29_X30)]; \
|
||||
\
|
||||
msr cpacr_el1, tmp1; \
|
||||
isb; \
|
||||
\
|
||||
/* Check whether the FPU is enabled. */ \
|
||||
/* If it isn't, skip saving FPU state. */ \
|
||||
and tmp1, tmp1, #0x300000; \
|
||||
cbz tmp1, done_label; \
|
||||
\
|
||||
/* Save fpcr and fpsr. */ \
|
||||
ldp tmp0, tmp1, [ctx, #(THREAD_CONTEXT_FPCR_FPSR)]; \
|
||||
msr fpcr, tmp0; \
|
||||
msr fpsr, tmp1; \
|
||||
\
|
||||
/* Save the FPU registers. */ \
|
||||
ldp q0, q1, [ctx, #(16 * 0 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q2, q3, [ctx, #(16 * 2 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q4, q5, [ctx, #(16 * 4 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q6, q7, [ctx, #(16 * 6 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q8, q9, [ctx, #(16 * 8 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q10, q11, [ctx, #(16 * 10 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q12, q13, [ctx, #(16 * 12 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q14, q15, [ctx, #(16 * 14 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q16, q17, [ctx, #(16 * 16 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q18, q19, [ctx, #(16 * 18 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q20, q21, [ctx, #(16 * 20 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q22, q23, [ctx, #(16 * 22 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q24, q25, [ctx, #(16 * 24 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q26, q27, [ctx, #(16 * 26 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q28, q29, [ctx, #(16 * 28 + THREAD_CONTEXT_FPU_REGISTERS)]; \
|
||||
ldp q30, q31, [ctx, #(16 * 30 + THREAD_CONTEXT_FPU_REGISTERS)];
|
||||
|
||||
|
||||
/* ams::kern::KScheduler::ScheduleImpl() */
|
||||
|
|
@ -109,11 +109,11 @@
|
|||
|
||||
_ZN3ams4kern10KScheduler12ScheduleImplEv:
|
||||
/* Right now, x0 contains (this). We want x1 to point to the scheduling state, */
|
||||
/* Current KScheduler layout has state at +0x0. */
|
||||
/* KScheduler layout has state at +0x0, this is guaranteed statically by assembly offsets. */
|
||||
mov x1, x0
|
||||
|
||||
/* First thing we want to do is check whether the interrupt task thread is runnable. */
|
||||
ldrb w3, [x1, #1]
|
||||
ldrb w3, [x1, #(KSCHEDULER_INTERRUPT_TASK_THREAD_RUNNABLE)]
|
||||
cbz w3, 0f
|
||||
|
||||
/* If it is, we want to call KScheduler::InterruptTaskThreadToRunnable() to change its state to runnable. */
|
||||
|
|
@ -124,7 +124,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
ldp x0, x1, [sp], 16
|
||||
|
||||
/* Clear the interrupt task thread as runnable. */
|
||||
strb wzr, [x1, #1]
|
||||
strb wzr, [x1, #(KSCHEDULER_INTERRUPT_TASK_THREAD_RUNNABLE)]
|
||||
|
||||
0: /* Interrupt task thread runnable checked. */
|
||||
/* Now we want to check if there's any scheduling to do. */
|
||||
|
|
@ -135,7 +135,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
dmb ish
|
||||
|
||||
/* Check if the highest priority thread is the same as the current thread. */
|
||||
ldr x7, [x1, 16]
|
||||
ldr x7, [x1, #(KSCHEDULER_HIGHEST_PRIORITY_THREAD)]
|
||||
ldr x2, [x18]
|
||||
cmp x7, x2
|
||||
b.ne 1f
|
||||
|
|
@ -158,7 +158,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
|
||||
2: /* We're done saving this thread's context, so we need to unlock it. */
|
||||
/* We can just do an atomic write to the relevant KThreadContext member. */
|
||||
add x2, x2, #0x280
|
||||
add x2, x2, #(THREAD_CONTEXT_LOCKED)
|
||||
stlrb wzr, [x2]
|
||||
|
||||
3: /* The current thread's context has been entirely taken care of. */
|
||||
|
|
@ -169,7 +169,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
mov x21, x7 /* highest priority thread */
|
||||
|
||||
/* Set our stack to the idle thread stack. */
|
||||
ldr x3, [x20, #0x18]
|
||||
ldr x3, [x20, #(KSCHEDULER_IDLE_THREAD_STACK)]
|
||||
mov sp, x3
|
||||
b 5f
|
||||
|
||||
|
|
@ -183,7 +183,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
dmb ish
|
||||
|
||||
/* Refresh the highest priority thread. */
|
||||
ldr x21, [x20, 16]
|
||||
ldr x21, [x20, #(KSCHEDULER_HIGHEST_PRIORITY_THREAD)]
|
||||
|
||||
5: /* We're starting to try to do the context switch. */
|
||||
/* Check if the highest priority thread if null. */
|
||||
|
|
@ -197,7 +197,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
mov x22, x0
|
||||
|
||||
/* Prepare to try to acquire the context lock. */
|
||||
add x1, x22, #0x280
|
||||
add x1, x22, #(THREAD_CONTEXT_LOCKED)
|
||||
mov w2, #1
|
||||
|
||||
6: /* We want to try to lock the highest priority thread's context. */
|
||||
|
|
@ -214,7 +214,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
|
||||
7: /* The highest priority thread's context is already locked. */
|
||||
/* Check if we need scheduling. If we don't, we can retry directly. */
|
||||
ldarb w3, [x20]
|
||||
ldarb w3, [x20] // ldarb w3, [x20, #(KSCHEDULER_NEEDS_SCHEDULING)]
|
||||
cbz w3, 6b
|
||||
|
||||
/* If we do, another core is interfering, and we must start from the top. */
|
||||
|
|
@ -229,7 +229,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
bl _ZN3ams4kern10KScheduler12SwitchThreadEPNS0_7KThreadE
|
||||
|
||||
/* Check if we need scheduling. If we don't, then we can't complete the switch and should retry. */
|
||||
ldarb w1, [x20]
|
||||
ldarb w1, [x20] // ldarb w1, [x20, #(KSCHEDULER_NEEDS_SCHEDULING)]
|
||||
cbnz w1, 10f
|
||||
|
||||
/* Restore the thread context. */
|
||||
|
|
@ -241,7 +241,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
|
||||
10: /* Our switch failed. */
|
||||
/* We should unlock the thread context, and then retry. */
|
||||
add x1, x22, #0x280
|
||||
add x1, x22, #(THREAD_CONTEXT_LOCKED)
|
||||
stlrb wzr, [x1]
|
||||
b 4b
|
||||
|
||||
|
|
@ -255,7 +255,7 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
|
||||
12: /* We've switched to the idle thread, so we want to loop until we schedule a non-idle thread. */
|
||||
/* Check if we need scheduling. */
|
||||
ldarb w3, [x20]
|
||||
ldarb w3, [x20] // ldarb w3, [x20, #(KSCHEDULER_NEEDS_SCHEDULING)]
|
||||
cbnz w3, 13f
|
||||
|
||||
/* If we don't, wait for an interrupt and check again. */
|
||||
|
|
@ -268,14 +268,14 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
|
|||
|
||||
13: /* We need scheduling again! */
|
||||
/* Check whether the interrupt task thread needs to be set runnable. */
|
||||
ldrb w3, [x20, #1]
|
||||
ldrb w3, [x20, #(KSCHEDULER_INTERRUPT_TASK_THREAD_RUNNABLE)]
|
||||
cbz w3, 4b
|
||||
|
||||
/* It does, so do so. We're using the idle thread stack so no register state preserve needed. */
|
||||
bl _ZN3ams4kern10KScheduler29InterruptTaskThreadToRunnableEv
|
||||
|
||||
/* Clear the interrupt task thread as runnable. */
|
||||
strb wzr, [x20, #1]
|
||||
strb wzr, [x20, #(KSCHEDULER_INTERRUPT_TASK_THREAD_RUNNABLE)]
|
||||
|
||||
/* Retry the scheduling loop. */
|
||||
b 4b
|
||||
|
|
|
|||
|
|
@ -27,39 +27,39 @@ _ZN3ams4kern4arch5arm6421UserModeThreadStarterEv:
|
|||
/* | KExceptionContext (size 0x120) | KThread::StackParameters (size 0x30) | */
|
||||
|
||||
/* Clear the disable count for this thread's stack parameters. */
|
||||
strh wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DISABLE_COUNT)]
|
||||
strh wzr, [sp, #(EXCEPTION_CONTEXT_SIZE + THREAD_STACK_PARAMETERS_DISABLE_COUNT)]
|
||||
|
||||
/* Call ams::kern::arch::arm64::OnThreadStart() */
|
||||
bl _ZN3ams4kern4arch5arm6413OnThreadStartEv
|
||||
|
||||
/* Restore thread state from the KExceptionContext on stack */
|
||||
ldp x30, x19, [sp, #(8 * 30)] /* x30 = lr, x19 = sp */
|
||||
ldp x20, x21, [sp, #(8 * 30 + 16)] /* x20 = pc, x21 = psr */
|
||||
ldr x22, [sp, #(8 * 30 + 32)] /* x22 = tpidr */
|
||||
ldp x30, x19, [sp, #(EXCEPTION_CONTEXT_X30_SP)] /* x30 = lr, x19 = sp */
|
||||
ldp x20, x21, [sp, #(EXCEPTION_CONTEXT_PC_PSR)] /* x20 = pc, x21 = psr */
|
||||
ldr x22, [sp, #(EXCEPTION_CONTEXT_TPIDR)] /* x22 = tpidr */
|
||||
|
||||
msr sp_el0, x19
|
||||
msr elr_el1, x20
|
||||
msr spsr_el1, x21
|
||||
msr tpidr_el0, x22
|
||||
|
||||
ldp x0, x1, [sp, #(8 * 0)]
|
||||
ldp x2, x3, [sp, #(8 * 2)]
|
||||
ldp x4, x5, [sp, #(8 * 4)]
|
||||
ldp x6, x7, [sp, #(8 * 6)]
|
||||
ldp x8, x9, [sp, #(8 * 8)]
|
||||
ldp x10, x11, [sp, #(8 * 10)]
|
||||
ldp x12, x13, [sp, #(8 * 12)]
|
||||
ldp x14, x15, [sp, #(8 * 14)]
|
||||
ldp x16, x17, [sp, #(8 * 16)]
|
||||
ldp x18, x19, [sp, #(8 * 18)]
|
||||
ldp x20, x21, [sp, #(8 * 20)]
|
||||
ldp x22, x23, [sp, #(8 * 22)]
|
||||
ldp x24, x25, [sp, #(8 * 24)]
|
||||
ldp x26, x27, [sp, #(8 * 26)]
|
||||
ldp x28, x29, [sp, #(8 * 28)]
|
||||
ldp x0, x1, [sp, #(EXCEPTION_CONTEXT_X0_X1)]
|
||||
ldp x2, x3, [sp, #(EXCEPTION_CONTEXT_X2_X3)]
|
||||
ldp x4, x5, [sp, #(EXCEPTION_CONTEXT_X4_X5)]
|
||||
ldp x6, x7, [sp, #(EXCEPTION_CONTEXT_X6_X7)]
|
||||
ldp x8, x9, [sp, #(EXCEPTION_CONTEXT_X8_X9)]
|
||||
ldp x10, x11, [sp, #(EXCEPTION_CONTEXT_X10_X11)]
|
||||
ldp x12, x13, [sp, #(EXCEPTION_CONTEXT_X12_X13)]
|
||||
ldp x14, x15, [sp, #(EXCEPTION_CONTEXT_X14_X15)]
|
||||
ldp x16, x17, [sp, #(EXCEPTION_CONTEXT_X16_X17)]
|
||||
ldp x18, x19, [sp, #(EXCEPTION_CONTEXT_X18_X19)]
|
||||
ldp x20, x21, [sp, #(EXCEPTION_CONTEXT_X20_X21)]
|
||||
ldp x22, x23, [sp, #(EXCEPTION_CONTEXT_X22_X23)]
|
||||
ldp x24, x25, [sp, #(EXCEPTION_CONTEXT_X24_X25)]
|
||||
ldp x26, x27, [sp, #(EXCEPTION_CONTEXT_X26_X27)]
|
||||
ldp x28, x29, [sp, #(EXCEPTION_CONTEXT_X28_X29)]
|
||||
|
||||
/* Increment stack pointer above the KExceptionContext */
|
||||
add sp, sp, #0x120
|
||||
add sp, sp, #(EXCEPTION_CONTEXT_SIZE)
|
||||
|
||||
/* Return to EL0 */
|
||||
eret
|
||||
|
|
@ -95,28 +95,28 @@ _ZN3ams4kern4arch5arm6427SupervisorModeThreadStarterEv:
|
|||
.type _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS3_, %function
|
||||
_ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS3_:
|
||||
/* Load and restore FPCR and FPSR from the context. */
|
||||
ldr x1, [x0, #0x70]
|
||||
ldr x1, [x0, #(THREAD_CONTEXT_FPCR)]
|
||||
msr fpcr, x1
|
||||
ldr x1, [x0, #0x78]
|
||||
ldr x1, [x0, #(THREAD_CONTEXT_FPSR)]
|
||||
msr fpsr, x1
|
||||
|
||||
/* Restore the FPU registers. */
|
||||
ldp q0, q1, [x0, #(16 * 0 + 0x80)]
|
||||
ldp q2, q3, [x0, #(16 * 2 + 0x80)]
|
||||
ldp q4, q5, [x0, #(16 * 4 + 0x80)]
|
||||
ldp q6, q7, [x0, #(16 * 6 + 0x80)]
|
||||
ldp q8, q9, [x0, #(16 * 8 + 0x80)]
|
||||
ldp q10, q11, [x0, #(16 * 10 + 0x80)]
|
||||
ldp q12, q13, [x0, #(16 * 12 + 0x80)]
|
||||
ldp q14, q15, [x0, #(16 * 14 + 0x80)]
|
||||
ldp q16, q17, [x0, #(16 * 16 + 0x80)]
|
||||
ldp q18, q19, [x0, #(16 * 18 + 0x80)]
|
||||
ldp q20, q21, [x0, #(16 * 20 + 0x80)]
|
||||
ldp q22, q23, [x0, #(16 * 22 + 0x80)]
|
||||
ldp q24, q25, [x0, #(16 * 24 + 0x80)]
|
||||
ldp q26, q27, [x0, #(16 * 26 + 0x80)]
|
||||
ldp q28, q29, [x0, #(16 * 28 + 0x80)]
|
||||
ldp q30, q31, [x0, #(16 * 30 + 0x80)]
|
||||
ldp q0, q1, [x0, #(16 * 0 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q2, q3, [x0, #(16 * 2 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q4, q5, [x0, #(16 * 4 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q6, q7, [x0, #(16 * 6 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q8, q9, [x0, #(16 * 8 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q10, q11, [x0, #(16 * 10 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q12, q13, [x0, #(16 * 12 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q14, q15, [x0, #(16 * 14 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q16, q17, [x0, #(16 * 16 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q18, q19, [x0, #(16 * 18 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q20, q21, [x0, #(16 * 20 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q22, q23, [x0, #(16 * 22 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q24, q25, [x0, #(16 * 24 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q26, q27, [x0, #(16 * 26 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q28, q29, [x0, #(16 * 28 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q30, q31, [x0, #(16 * 30 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
|
||||
ret
|
||||
|
||||
|
|
@ -126,19 +126,19 @@ _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS3_:
|
|||
.type _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters32ERKS3_, %function
|
||||
_ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters32ERKS3_:
|
||||
/* Load and restore FPCR and FPSR from the context. */
|
||||
ldr x1, [x0, #0x70]
|
||||
ldr x1, [x0, #(THREAD_CONTEXT_FPCR)]
|
||||
msr fpcr, x1
|
||||
ldr x1, [x0, #0x78]
|
||||
ldr x1, [x0, #(THREAD_CONTEXT_FPSR)]
|
||||
msr fpsr, x1
|
||||
|
||||
/* Restore the FPU registers. */
|
||||
ldp q0, q1, [x0, #(16 * 0 + 0x80)]
|
||||
ldp q2, q3, [x0, #(16 * 2 + 0x80)]
|
||||
ldp q4, q5, [x0, #(16 * 4 + 0x80)]
|
||||
ldp q6, q7, [x0, #(16 * 6 + 0x80)]
|
||||
ldp q8, q9, [x0, #(16 * 8 + 0x80)]
|
||||
ldp q10, q11, [x0, #(16 * 10 + 0x80)]
|
||||
ldp q12, q13, [x0, #(16 * 12 + 0x80)]
|
||||
ldp q14, q15, [x0, #(16 * 14 + 0x80)]
|
||||
ldp q0, q1, [x0, #(16 * 0 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q2, q3, [x0, #(16 * 2 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q4, q5, [x0, #(16 * 4 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q6, q7, [x0, #(16 * 6 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q8, q9, [x0, #(16 * 8 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q10, q11, [x0, #(16 * 10 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q12, q13, [x0, #(16 * 12 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
ldp q14, q15, [x0, #(16 * 14 + THREAD_CONTEXT_FPU_REGISTERS)]
|
||||
|
||||
ret
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue