exo2: implement the first half of SmcCpuSuspend

This commit is contained in:
Michael Scire 2020-06-07 19:16:48 -07:00 committed by SciresM
parent e1835d9ba2
commit 0202a95832
11 changed files with 175 additions and 5 deletions

View file

@ -27,6 +27,7 @@ namespace ams::clkrst {
void EnableUartCClock();
void EnableActmonClock();
void EnableI2c1Clock();
void EnableI2c5Clock();
void DisableI2c1Clock();

View file

@ -25,5 +25,6 @@ namespace ams::flow {
void SetCpuCsr(int core, u32 enable_ext);
void SetHaltCpuEvents(int core, bool resume_on_irq);
void SetCc4Ctrl(int core, u32 value);
void ClearL2FlushControl();
}

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@ -36,6 +36,8 @@ namespace ams::pmc {
void SetRegisterAddress(uintptr_t address);
void InitializeRandomScratch();
void EnableWakeEventDetection();
void ConfigureForSc7Entry();
void LockSecureRegister(SecureRegister reg);

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@ -29,5 +29,7 @@ namespace ams::pmic {
void EnableVddCpu(Regulator regulator);
void DisableVddCpu(Regulator regulator);
void EnableSleep();
bool IsAcOk();
}

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@ -18,6 +18,7 @@
#define FLOW_CTLR_FLOW_DBG_QUAL (0x050)
#define FLOW_CTLR_L2FLUSH_CONTROL (0x094)
#define FLOW_CTLR_BPMP_CLUSTER_CONTROL (0x098)
#define FLOW_CTLR_CPU0_CSR (0x008)

View file

@ -212,3 +212,5 @@ DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_XUSBB, 21, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_XUSBC, 22, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_VIC, 23, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_IRAM, 24, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CNTRL2_WAKE_DET_EN, 9, DISABLE, ENABLE);